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[src/trunk]: src/sys/arch/powerpc Fix various nits related to P2020 support.
details: https://anonhg.NetBSD.org/src/rev/4a92fe8c5edf
branches: trunk
changeset: 763281:4a92fe8c5edf
user: matt <matt%NetBSD.org@localhost>
date: Wed Mar 16 05:31:03 2011 +0000
description:
Fix various nits related to P2020 support.
diffstat:
sys/arch/powerpc/booke/dev/pq3etsec.c | 21 ++++++++++------
sys/arch/powerpc/booke/dev/pq3gpio.c | 39 +++++++++++++++++++++++++++++++-
sys/arch/powerpc/booke/e500_intr.c | 4 +-
sys/arch/powerpc/booke/pci/pq3pci.c | 8 +++---
sys/arch/powerpc/include/booke/e500reg.h | 8 ++++-
5 files changed, 63 insertions(+), 17 deletions(-)
diffs (177 lines):
diff -r 9d9afbdc8811 -r 4a92fe8c5edf sys/arch/powerpc/booke/dev/pq3etsec.c
--- a/sys/arch/powerpc/booke/dev/pq3etsec.c Wed Mar 16 05:08:29 2011 +0000
+++ b/sys/arch/powerpc/booke/dev/pq3etsec.c Wed Mar 16 05:31:03 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pq3etsec.c,v 1.2 2011/01/18 01:02:53 matt Exp $ */
+/* $NetBSD: pq3etsec.c,v 1.3 2011/03/16 05:31:03 matt Exp $ */
/*-
* Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -610,15 +610,20 @@
ifmedia_init(&sc->sc_mii.mii_media, 0, ether_mediachange,
ether_mediastatus);
- mii_attach(miiself, &sc->sc_mii, 0xffffffff,
- sc->sc_phy_addr, MII_OFFSET_ANY, MIIF_DOPAUSE);
+ if (sc->sc_phy_addr < 32) {
+ mii_attach(miiself, &sc->sc_mii, 0xffffffff,
+ sc->sc_phy_addr, MII_OFFSET_ANY, MIIF_DOPAUSE);
- if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
- ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
- ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
+ if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
+ ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
+ ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
+ } else {
+ callout_schedule(&sc->sc_mii_callout, hz);
+ ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
+ }
} else {
- callout_schedule(&sc->sc_mii_callout, hz);
- ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
+ ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_1000_T|IFM_FDX, 0, NULL);
+ ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_1000_T|IFM_FDX);
}
ec->ec_capabilities = ETHERCAP_VLAN_MTU | ETHERCAP_VLAN_HWTAGGING
diff -r 9d9afbdc8811 -r 4a92fe8c5edf sys/arch/powerpc/booke/dev/pq3gpio.c
--- a/sys/arch/powerpc/booke/dev/pq3gpio.c Wed Mar 16 05:08:29 2011 +0000
+++ b/sys/arch/powerpc/booke/dev/pq3gpio.c Wed Mar 16 05:31:03 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pq3gpio.c,v 1.2 2011/01/18 01:02:53 matt Exp $ */
+/* $NetBSD: pq3gpio.c,v 1.3 2011/03/16 05:31:03 matt Exp $ */
/*-
* Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -285,6 +285,40 @@
}
#endif /* MPC8548 */
+#ifdef P2020
+static void
+pq3gpio_p20x0_attach(device_t self, bus_space_tag_t bst,
+ bus_space_handle_t bsh, u_int svr)
+{
+ static const uint32_t gpio2pmuxcr_map[][2] = {
+ { __BIT(10), PMUXCR_TSEC3_TS|PMUXCR_USB },
+ { __BIT(11), PMUXCR_TSEC3_TS|PMUXCR_USB },
+ { __BIT(12), PMUXCR_TSEC1_TS },
+ { __BIT(13), PMUXCR_TSEC1_TS },
+ { __BIT(14), PMUXCR_TSEC2_TS },
+ { __BIT(15), PMUXCR_TSEC2_TS },
+ };
+
+ uint32_t pinmask = ~0; /* assume all bits are valid */
+ size_t pincnt = 32;
+ const uint32_t pmuxcr = bus_space_read_4(bst, bsh, PMUXCR);
+ for (size_t i = 0; i < __arraycount(gpio2pmuxcr_map); i++) {
+ if (pmuxcr & gpio2pmuxcr_map[i][1]) {
+ pinmask &= ~gpio2pmuxcr_map[i][0];
+ pincnt--;
+ }
+ }
+
+ /*
+ * Create GPIO pin groups
+ */
+ aprint_normal_dev(self, "%zu input pins, %zu output pins\n",
+ pincnt, pincnt);
+ pq3gpio_group_create(self, bst, bsh, GPINDR, pinmask, GPIO_PIN_INPUT);
+ pq3gpio_group_create(self, bst, bsh, GPOUTDR, pinmask, GPIO_PIN_OUTPUT);
+}
+#endif /* P2020 */
+
static const struct {
uint16_t svr;
void (*attach)(device_t, bus_space_tag_t, bus_space_handle_t, u_int);
@@ -301,6 +335,9 @@
#ifdef MPC8536
{ SVR_MPC8536v1 >> 16, pq3gpio_mpc8536_attach },
#endif
+#ifdef P2020
+ { SVR_P2020v2 >> 16, pq3gpio_p20x0_attach },
+#endif
};
void
diff -r 9d9afbdc8811 -r 4a92fe8c5edf sys/arch/powerpc/booke/e500_intr.c
--- a/sys/arch/powerpc/booke/e500_intr.c Wed Mar 16 05:08:29 2011 +0000
+++ b/sys/arch/powerpc/booke/e500_intr.c Wed Mar 16 05:31:03 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: e500_intr.c,v 1.3 2011/02/16 18:43:35 matt Exp $ */
+/* $NetBSD: e500_intr.c,v 1.4 2011/03/16 05:31:03 matt Exp $ */
/*-
* Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -1018,7 +1018,7 @@
struct intr_source *is;
struct e500_intr_info * const ii = &e500_intr_info;
- const uint16_t svr = mfspr(SPR_SVR) >> 16;
+ const uint16_t svr = (mfspr(SPR_SVR) & ~0x80000) >> 16;
switch (svr) {
#ifdef MPC8536
case SVR_MPC8536v1 >> 16:
diff -r 9d9afbdc8811 -r 4a92fe8c5edf sys/arch/powerpc/booke/pci/pq3pci.c
--- a/sys/arch/powerpc/booke/pci/pq3pci.c Wed Mar 16 05:08:29 2011 +0000
+++ b/sys/arch/powerpc/booke/pci/pq3pci.c Wed Mar 16 05:31:03 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pq3pci.c,v 1.3 2011/02/08 06:19:13 matt Exp $ */
+/* $NetBSD: pq3pci.c,v 1.4 2011/03/16 05:31:04 matt Exp $ */
/*-
* Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -44,7 +44,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pq3pci.c,v 1.3 2011/02/08 06:19:13 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pq3pci.c,v 1.4 2011/03/16 05:31:04 matt Exp $");
#include <sys/param.h>
#include <sys/device.h>
@@ -83,9 +83,9 @@
TRUTH_ENCODE(SVR_MPC8572v1, inst, PORDEVSR_##field, \
__SHIFTIN(field##_##MPC8572##_##value, PORDEVSR_##field), result)
#define PORDEVSR_P20x0_TRUTH_ENCODE(inst, field, value, result) \
- TRUTH_ENCODE(SVR_P2020, inst, PORDEVSR_##field, \
+ TRUTH_ENCODE(SVR_P2020v2, inst, PORDEVSR_##field, \
__SHIFTIN(field##_##P20x0##_##value, PORDEVSR_##field), result), \
- TRUTH_ENCODE(SVR_P2010, inst, PORDEVSR_##field, \
+ TRUTH_ENCODE(SVR_P2010v2, inst, PORDEVSR_##field, \
__SHIFTIN(field##_##P20x0##_##value, PORDEVSR_##field), result)
#define PORDEVSR_TRUTH_ENCODE(svr, inst, field, value, result) \
diff -r 9d9afbdc8811 -r 4a92fe8c5edf sys/arch/powerpc/include/booke/e500reg.h
--- a/sys/arch/powerpc/include/booke/e500reg.h Wed Mar 16 05:08:29 2011 +0000
+++ b/sys/arch/powerpc/include/booke/e500reg.h Wed Mar 16 05:31:03 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: e500reg.h,v 1.4 2011/02/16 18:38:48 matt Exp $ */
+/* $NetBSD: e500reg.h,v 1.5 2011/03/16 05:31:04 matt Exp $ */
/*-
* Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -361,7 +361,7 @@
#define IOSEL_P20x0_PCIE12_X1_3_X2 2
#define IOSEL_P20x0_PCIE13_X2 4
#define IOSEL_P20x0_PCIE1_X4 6
-#define IOSEL_P20x0_PCIE1_X1_SRIO12500_1X 13
+#define IOSEL_P20x0_PCIE1_X1_SRIO2500_1X 13
#define IOSEL_P20x0_PCIE12_X1_SGMII23 14
#define IOSEL_P20x0_PCIE1_X2_SGMII23 15
#define PORDEVSR_PCI2_ARB __PPCBIT(13)
@@ -404,9 +404,13 @@
#define PMUXCR_SDHC_CD __PPCBIT(1)
#define PMUXCR_SDHC_WP __PPCBIT(2)
#define PMUXCR_PCI_REQGNT3 __PPCBIT(3)
+#define PMUXCR_TSEC1_TS __PPCBIT(3)
#define PMUXCR_PCI_REQGNT4 __PPCBIT(4)
+#define PMUXCR_TSEC2_TS __PPCBIT(4)
#define PMUXCR_USB1 __PPCBIT(5)
+#define PMUXCR_TSEC3_TS __PPCBIT(5)
#define PMUXCR_USB2 __PPCBIT(6)
+#define PMUXCR_USB __PPCBIT(6)
#define PMUXCR_DMA0 __PPCBIT(14)
#define PMUXCR_DMA2 __PPCBIT(15)
#define PMUXCR_DMA1 __PPCBIT(30)
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