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[src/trunk]: src/sys/arch/arm split arch/arm/pic/pic.c so that we can impleme...



details:   https://anonhg.NetBSD.org/src/rev/34b3c55ee2bd
branches:  trunk
changeset: 763145:34b3c55ee2bd
user:      bsh <bsh%NetBSD.org@localhost>
date:      Fri Mar 11 03:16:13 2011 +0000

description:
split arch/arm/pic/pic.c so that we can implement more efficient version of splfoo() while using pic framework.

diffstat:

 sys/arch/arm/gemini/files.gemini |   4 +-
 sys/arch/arm/imx/files.imx31     |   4 +-
 sys/arch/arm/imx/files.imx51     |   4 +-
 sys/arch/arm/omap/files.omap2    |   4 +-
 sys/arch/arm/pic/files.pic       |   4 +-
 sys/arch/arm/pic/pic.c           |  54 ++++---------------------
 sys/arch/arm/pic/pic_splfuncs.c  |  83 ++++++++++++++++++++++++++++++++++++++++
 7 files changed, 104 insertions(+), 53 deletions(-)

diffs (255 lines):

diff -r fc20b062c214 -r 34b3c55ee2bd sys/arch/arm/gemini/files.gemini
--- a/sys/arch/arm/gemini/files.gemini  Thu Mar 10 23:02:56 2011 +0000
+++ b/sys/arch/arm/gemini/files.gemini  Fri Mar 11 03:16:13 2011 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: files.gemini,v 1.10 2008/12/14 01:57:02 matt Exp $
+#      $NetBSD: files.gemini,v 1.11 2011/03/11 03:16:13 bsh Exp $
 #
 # Configuration info for GEMINI CPU support
 # Based on omap/files.omap2
@@ -38,7 +38,7 @@
 ##file arch/arm/gemini/gemini_nobyteacc_io.S           obio
 
 # GEMINI interrupt controller
-device geminiicu: pic
+device geminiicu: pic, pic_splfuncs
 attach geminiicu at obio with geminiicu
 file   arch/arm/gemini/gemini_icu.c            geminiicu needs-flag
 
diff -r fc20b062c214 -r 34b3c55ee2bd sys/arch/arm/imx/files.imx31
--- a/sys/arch/arm/imx/files.imx31      Thu Mar 10 23:02:56 2011 +0000
+++ b/sys/arch/arm/imx/files.imx31      Fri Mar 11 03:16:13 2011 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: files.imx31,v 1.6 2010/11/15 18:19:19 bsh Exp $
+#      $NetBSD: files.imx31,v 1.7 2011/03/11 03:16:13 bsh Exp $
 #
 # Configuration info for the Freescale i.MX31
 #
@@ -23,7 +23,7 @@
 
 # iMX AdVanced Interrupt Controller
 include "arch/arm/pic/files.pic"
-device avic: pic
+device avic: pic, pic_splfuncs
 attach avic at ahb
 file   arch/arm/imx/imx31_icu.c                avic            needs-flag
 file   arch/arm/arm32/irq_dispatch.S
diff -r fc20b062c214 -r 34b3c55ee2bd sys/arch/arm/imx/files.imx51
--- a/sys/arch/arm/imx/files.imx51      Thu Mar 10 23:02:56 2011 +0000
+++ b/sys/arch/arm/imx/files.imx51      Fri Mar 11 03:16:13 2011 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: files.imx51,v 1.2 2010/11/30 13:05:27 bsh Exp $
+#      $NetBSD: files.imx51,v 1.3 2011/03/11 03:16:13 bsh Exp $
 #
 # Configuration info for the Freescale i.MX51
 #
@@ -18,7 +18,7 @@
 
 # iMX51 TrustZone Interrupt Controller
 include "arch/arm/pic/files.pic"
-device tzic: pic
+device tzic: pic, pic_splfuncs
 attach tzic at axi
 file   arch/arm/imx/imx51_tzic.c               tzic    needs-flag
 file   arch/arm/arm32/irq_dispatch.S
diff -r fc20b062c214 -r 34b3c55ee2bd sys/arch/arm/omap/files.omap2
--- a/sys/arch/arm/omap/files.omap2     Thu Mar 10 23:02:56 2011 +0000
+++ b/sys/arch/arm/omap/files.omap2     Fri Mar 11 03:16:13 2011 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: files.omap2,v 1.7 2011/02/26 18:07:18 ahoka Exp $
+#      $NetBSD: files.omap2,v 1.8 2011/03/11 03:16:13 bsh Exp $
 #
 # Configuration info for Texas Instruments OMAP2/OMAP3 CPU support
 # Based on xscale/files.pxa2x0
@@ -32,7 +32,7 @@
 file   arch/arm/xscale/pxa2x0_a4x_io.S         obio
 
 # OMAP2 interrupt controller
-device omapicu: pic
+device omapicu: pic, pic_splfuncs
 attach omapicu at obio with omap2icu
 file   arch/arm/omap/omap2_icu.c               (omap2 | omap3) & omapicu
 file   arch/arm/omap/omap2430_intr.c           omap2 & !omapicu
diff -r fc20b062c214 -r 34b3c55ee2bd sys/arch/arm/pic/files.pic
--- a/sys/arch/arm/pic/files.pic        Thu Mar 10 23:02:56 2011 +0000
+++ b/sys/arch/arm/pic/files.pic        Fri Mar 11 03:16:13 2011 +0000
@@ -1,7 +1,9 @@
-#      $NetBSD: files.pic,v 1.2 2008/04/27 18:58:45 matt Exp $
+#      $NetBSD: files.pic,v 1.3 2011/03/11 03:16:14 bsh Exp $
 #
 # Configuration info for the common PIC code.
 #
 define pic
+define pic_splfuncs
 
 file   arch/arm/pic/pic.c              pic
+file   arch/arm/pic/pic_splfuncs.c     pic & pic_splfuncs
diff -r fc20b062c214 -r 34b3c55ee2bd sys/arch/arm/pic/pic.c
--- a/sys/arch/arm/pic/pic.c    Thu Mar 10 23:02:56 2011 +0000
+++ b/sys/arch/arm/pic/pic.c    Fri Mar 11 03:16:13 2011 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pic.c,v 1.7 2011/02/01 21:44:27 jakllsch Exp $ */
+/*     $NetBSD: pic.c,v 1.8 2011/03/11 03:16:14 bsh Exp $      */
 /*-
  * Copyright (c) 2008 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -28,7 +28,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.7 2011/02/01 21:44:27 jakllsch Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.8 2011/03/11 03:16:14 bsh Exp $");
 
 #define _INTR_PRIVATE
 #include <sys/param.h>
@@ -158,7 +158,14 @@
                        return ipl_irq_mask;
 
                irq_mask = __BIT(irq);
-               KASSERT(pic->pic_sources[irq_base + irq] != NULL);
+#if 1
+               KASSERT(pic->pic_sources[irq_base + irq] != NULL);
+#else
+               if (pic->pic_sources[irq_base + irq] == NULL) {
+                       aprint_error("stray interrupt? irq_base=%zu irq=%d\n",
+                           irq_base, irq);
+               } else
+#endif
                if (pic->pic_sources[irq_base + irq]->is_ipl == ipl)
                        ipl_irq_mask |= irq_mask;
 
@@ -521,47 +528,6 @@
        free(is, M_INTRSOURCE);
 }
 
-int
-_splraise(int newipl)
-{
-       struct cpu_info * const ci = curcpu();
-       const int oldipl = ci->ci_cpl;
-       KASSERT(newipl < NIPL);
-       if (newipl > ci->ci_cpl)
-               ci->ci_cpl = newipl;
-       return oldipl;
-}
-int
-_spllower(int newipl)
-{
-       struct cpu_info * const ci = curcpu();
-       const int oldipl = ci->ci_cpl;
-       KASSERT(panicstr || newipl <= ci->ci_cpl);
-       if (newipl < ci->ci_cpl) {
-               register_t psw = disable_interrupts(I32_bit);
-               ci->ci_intr_depth++;
-               pic_do_pending_ints(psw, newipl, NULL);
-               ci->ci_intr_depth--;
-               restore_interrupts(psw);
-       }
-       return oldipl;
-}
-
-void
-splx(int savedipl)
-{
-       struct cpu_info * const ci = curcpu();
-       KASSERT(savedipl < NIPL);
-       if (savedipl < ci->ci_cpl) {
-               register_t psw = disable_interrupts(I32_bit);
-               ci->ci_intr_depth++;
-               pic_do_pending_ints(psw, savedipl, NULL);
-               ci->ci_intr_depth--;
-               restore_interrupts(psw);
-       }
-       ci->ci_cpl = savedipl;
-}
-
 void *
 intr_establish(int irq, int ipl, int type, int (*func)(void *), void *arg)
 {
diff -r fc20b062c214 -r 34b3c55ee2bd sys/arch/arm/pic/pic_splfuncs.c
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/pic/pic_splfuncs.c   Fri Mar 11 03:16:13 2011 +0000
@@ -0,0 +1,83 @@
+/*     $NetBSD: pic_splfuncs.c,v 1.1 2011/03/11 03:16:14 bsh Exp $     */
+/*-
+ * Copyright (c) 2008 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Matt Thomas.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.1 2011/03/11 03:16:14 bsh Exp $");
+
+#define _INTR_PRIVATE
+#include <sys/param.h>
+#include <sys/evcnt.h>
+#include <sys/atomic.h>
+#include <sys/malloc.h>
+#include <sys/mallocvar.h>
+#include <sys/atomic.h>
+
+#include <arm/armreg.h>
+#include <arm/cpu.h>
+#include <arm/cpufunc.h>
+
+#include <arm/pic/picvar.h>
+
+
+int
+_splraise(int newipl)
+{
+       struct cpu_info * const ci = curcpu();
+       const int oldipl = ci->ci_cpl;
+       KASSERT(newipl < NIPL);
+       if (newipl > ci->ci_cpl)
+               ci->ci_cpl = newipl;
+       return oldipl;
+}
+int
+_spllower(int newipl)
+{
+       struct cpu_info * const ci = curcpu();
+       const int oldipl = ci->ci_cpl;
+       KASSERT(panicstr || newipl <= ci->ci_cpl);
+       if (newipl < ci->ci_cpl) {
+               register_t psw = disable_interrupts(I32_bit);
+               pic_do_pending_ints(psw, newipl, NULL);
+               restore_interrupts(psw);
+       }
+       return oldipl;
+}
+
+void
+splx(int savedipl)
+{
+       struct cpu_info * const ci = curcpu();
+       KASSERT(savedipl < NIPL);
+       if (savedipl < ci->ci_cpl) {
+               register_t psw = disable_interrupts(I32_bit);
+               pic_do_pending_ints(psw, savedipl, NULL);
+               restore_interrupts(psw);
+       }
+       ci->ci_cpl = savedipl;
+}



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