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[src/trunk]: src/sys/external/bsd/drm/dist/shared-core add minimal support fo...
details: https://anonhg.NetBSD.org/src/rev/3060168699d6
branches: trunk
changeset: 755895:3060168699d6
user: mrg <mrg%NetBSD.org@localhost>
date: Sat Jun 26 23:05:13 2010 +0000
description:
add minimal support for radeon 5xxx. there's not enough for it to be
useful yet, but that's not a big deal since the latest xf86-video-ati
doesn't support DRM on these yet.
new microcode images obtained from:
http://people.freedesktop.org/~agd5f/radeon_ucode/
XXX: need to fix max_hw_contexts handling at the very least.
XXX: should convert radeondrm to use firmload(9)
diffstat:
sys/external/bsd/drm/dist/shared-core/r600_cp.c | 51 +-
sys/external/bsd/drm/dist/shared-core/radeonhd_microcode.h | 14917 +++++++++++
2 files changed, 14962 insertions(+), 6 deletions(-)
diffs (truncated from 15019 to 300 lines):
diff -r 4f5e1983fb56 -r 3060168699d6 sys/external/bsd/drm/dist/shared-core/r600_cp.c
--- a/sys/external/bsd/drm/dist/shared-core/r600_cp.c Sat Jun 26 23:00:19 2010 +0000
+++ b/sys/external/bsd/drm/dist/shared-core/r600_cp.c Sat Jun 26 23:05:13 2010 +0000
@@ -34,6 +34,7 @@
#include "r300_reg.h"
#include "r600_microcode.h"
+#include "radeonhd_microcode.h"
# define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */
# define ATI_PCIGART_PAGE_MASK (~(ATI_PCIGART_PAGE_SIZE-1))
@@ -415,6 +416,8 @@
/* load r600 microcode */
static void r700_cp_load_microcode(drm_radeon_private_t * dev_priv)
{
+ size_t pfp_req_size, me_req_size;
+
const u32 *pfp;
const u32 *cp;
int i;
@@ -436,10 +439,39 @@
pfp = RV710_pfp_microcode;
cp = RV710_cp_microcode;
break;
+ case CHIP_CEDAR:
+ DRM_INFO("Loading CEDAR Microcode\n");
+ pfp = CEDAR_pfp_microcode;
+ cp = CEDAR_me_microcode;
+ break;
+ case CHIP_REDWOOD:
+ DRM_INFO("Loading REDWOOD Microcode\n");
+ pfp = REDWOOD_pfp_microcode;
+ cp = REDWOOD_me_microcode;
+ break;
+ case CHIP_JUNIPER:
+ DRM_INFO("Loading JUNIPER Microcode\n");
+ pfp = JUNIPER_pfp_microcode;
+ cp = JUNIPER_me_microcode;
+ break;
+ case CHIP_CYPRESS:
+ case CHIP_HEMLOCK:
+ DRM_INFO("Loading CYPRESS Microcode\n");
+ pfp = CYPRESS_pfp_microcode;
+ cp = CYPRESS_me_microcode;
+ break;
default:
return;
}
+ if (((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_CEDAR)) {
+ pfp_req_size = EVERGREEN_PFP_UCODE_SIZE * 4;
+ me_req_size = EVERGREEN_PM4_UCODE_SIZE * 4;
+ } else {
+ pfp_req_size = R700_PFP_UCODE_SIZE * 4;
+ me_req_size = R700_PM4_UCODE_SIZE * 4;
+ }
+
r600_do_cp_stop(dev_priv);
RADEON_WRITE(R600_CP_RB_CNTL,
@@ -453,12 +485,12 @@
RADEON_WRITE(R600_GRBM_SOFT_RESET, 0);
RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
- for (i = 0; i < R700_PFP_UCODE_SIZE; i++)
+ for (i = 0; i < pfp_req_size; i++)
RADEON_WRITE(R600_CP_PFP_UCODE_DATA, pfp[i]);
RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
- for (i = 0; i < R700_PM4_UCODE_SIZE; i++)
+ for (i = 0; i < me_req_size; i++)
RADEON_WRITE(R600_CP_ME_RAM_DATA, cp[i]);
RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
@@ -2167,11 +2199,18 @@
BEGIN_RING(7);
OUT_RING(CP_PACKET3(R600_IT_ME_INITIALIZE, 5));
OUT_RING(0x00000001);
- if (((dev_priv->flags & RADEON_FAMILY_MASK) < CHIP_RV770))
+ if (((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_CEDAR)) {
+ OUT_RING(0x00000000);
+ /* XXXMRG add/use evergreen_max_hw_contexts */
+ OUT_RING((dev_priv->r600_max_hw_contexts - 1));
+ } else if (((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770)) {
+ OUT_RING(0x00000000);
+ /* XXXMRG add/use rv770_max_hw_contexts */
+ OUT_RING((dev_priv->r600_max_hw_contexts - 1));
+ } else {
OUT_RING(0x00000003);
- else
- OUT_RING(0x00000000);
- OUT_RING((dev_priv->r600_max_hw_contexts - 1));
+ OUT_RING((dev_priv->r600_max_hw_contexts - 1));
+ }
OUT_RING(R600_ME_INITIALIZE_DEVICE_ID(1));
OUT_RING(0x00000000);
OUT_RING(0x00000000);
diff -r 4f5e1983fb56 -r 3060168699d6 sys/external/bsd/drm/dist/shared-core/radeonhd_microcode.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/external/bsd/drm/dist/shared-core/radeonhd_microcode.h Sat Jun 26 23:05:13 2010 +0000
@@ -0,0 +1,14917 @@
+/*
+ * Copyright 2010 Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#define EVERGREEN_PFP_UCODE_SIZE 1120
+#define EVERGREEN_PM4_UCODE_SIZE 1376
+
+static const u32 CEDAR_me_microcode[]={
+0x7C408000,
+0xA0000000,
+0xCC80004D,
+0x80000000,
+0xD440007F,
+0x1C8C0002,
+0x98C0000B,
+0x7C410000,
+0xC80C000E,
+0x98C00003,
+0x043C0005,
+0xCFC1A2A4,
+0xCC000060,
+0xCC01A1F4,
+0xCC000047,
+0x80000000,
+0xD0400060,
+0xC80C0010,
+0x98C00003,
+0x043C0023,
+0xCFC1A2A4,
+0xCC000060,
+0xCC01A1F3,
+0xCC000049,
+0x80000000,
+0xD0400060,
+0xCC000046,
+0x8400002D,
+0xCC00004B,
+0xCC412264,
+0xCC412265,
+0xCC412266,
+0x80000000,
+0xCC41A2DD,
+0xCC400046,
+0x8400002D,
+0xCC00004B,
+0x04142264,
+0x04182265,
+0x041C2266,
+0xD8174100,
+0xD81B4100,
+0xD81F4100,
+0x80000000,
+0xCC41A2DD,
+0xC03A0004,
+0x0434226B,
+0x0430225C,
+0x7F7B4007,
+0xCC350000,
+0xC83C0004,
+0x88000000,
+0xCFF10000,
+0x7C40C000,
+0x94C0FFCA,
+0xCC00001F,
+0x80000000,
+0xCC000041,
+0x7C40C000,
+0xC0160004,
+0x1CD0FFFF,
+0x7D150007,
+0xCC110000,
+0x18D8003E,
+0x14DC001F,
+0xC8200004,
+0x95C00006,
+0x7C424000,
+0xCC00004D,
+0x7E568007,
+0xCC290000,
+0xC8240004,
+0x7E260006,
+0x95800006,
+0x7C42C000,
+0xCC00004D,
+0x7ED70007,
+0xCC310000,
+0xC82C0004,
+0x7E2E0007,
+0xCC00004D,
+0x1D10FFFF,
+0x80000000,
+0xCE110000,
+0x7C40C000,
+0x80000000,
+0xCC400040,
+0xCD41225D,
+0xCC400045,
+0xCC00004A,
+0xCD01225C,
+0xCC41A1FC,
+0x7C408000,
+0xA0000000,
+0xCC80004D,
+0x80000000,
+0xCC412257,
+0x7C418000,
+0xCC400045,
+0xCC40004A,
+0xCC41225C,
+0xCC41A1FC,
+0x7C408000,
+0xA0000000,
+0xCC80004D,
+0xCC000045,
+0x80000064,
+0xCC00004A,
+0x040CA1FD,
+0xC0120001,
+0xCC000045,
+0xCC00004A,
+0x7CD0C007,
+0xCC41225C,
+0xCC41A1FC,
+0xD44D0000,
+0x7C408000,
+0xA0000000,
+0xCC80004D,
+0x80000000,
+0xCC41225D,
+0xCC000045,
+0xCC00004A,
+0x084C0001,
+0x7C410000,
+0x7C414000,
+0x1D58FFFF,
+0x195C03F0,
+0x15600015,
+0xCD81A102,
+0xCDC12256,
+0xCE01225C,
+0x94C00005,
+0x21240020,
+0xCE41A1FC,
+0x8000007D,
+0x08CC0001,
+0xCD01A1FC,
+0xCC01A102,
+0x7C408000,
+0xA0000000,
+0xCC80004D,
+0x7C408000,
+0x7C40C000,
+0xC02A0002,
+0x7C410000,
+0x7D290007,
+0x1C940001,
+0x1C980006,
+0x1C9C0300,
+0x15DC0008,
+0x7C420000,
+0x7C424000,
+0x9540000F,
+0xC02E0004,
+0x05F02258,
+0x7F2F0007,
+0xCC310000,
+0xC8280004,
+0xCCC12169,
+0xCD01216A,
+0xCE81216B,
+0x29B40002,
+0xCC01216C,
+0x9740000E,
+0x29B40000,
+0x800000BD,
+0xC834000E,
+0x29B40002,
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