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[src/trunk]: src/sys/arch/mips/mips Sync with mipsX_subr.S:



details:   https://anonhg.NetBSD.org/src/rev/bc2442e81ab6
branches:  trunk
changeset: 763903:bc2442e81ab6
user:      tsutsui <tsutsui%NetBSD.org@localhost>
date:      Wed Apr 06 14:12:36 2011 +0000

description:
Sync with mipsX_subr.S:
>> Rename kernel_tlb_miss to kern_tlb_miss (everything else kern_xxx)

diffstat:

 sys/arch/mips/mips/locore_mips1.S |  12 ++++++------
 1 files changed, 6 insertions(+), 6 deletions(-)

diffs (47 lines):

diff -r c45b8a7e1dc0 -r bc2442e81ab6 sys/arch/mips/mips/locore_mips1.S
--- a/sys/arch/mips/mips/locore_mips1.S Wed Apr 06 14:04:32 2011 +0000
+++ b/sys/arch/mips/mips/locore_mips1.S Wed Apr 06 14:12:36 2011 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: locore_mips1.S,v 1.76 2011/04/06 05:39:51 matt Exp $   */
+/*     $NetBSD: locore_mips1.S,v 1.77 2011/04/06 14:12:36 tsutsui Exp $        */
 
 /*
  * Copyright (c) 1992, 1993
@@ -987,7 +987,7 @@
 
 /*----------------------------------------------------------------------------
  *
- * mipsN_kernel_tlb_miss --
+ * mipsN_kern_tlb_miss --
  *
  *     Handle a TLB miss exception from kernel mode in kernel space.
  *     The BaddVAddr, Context, and EntryHi registers contain the failed
@@ -1001,7 +1001,7 @@
  *
  *----------------------------------------------------------------------------
  */
-LEAF_NOPROFILE(MIPSX(kernel_tlb_miss))
+LEAF_NOPROFILE(MIPSX(kern_tlb_miss))
        .set    noat
        _MFC0   k0, MIPS_COP_0_BAD_VADDR        # get the fault address
        li      k1, VM_MIN_KERNEL_ADDRESS       # compute index
@@ -1026,7 +1026,7 @@
        tlbwr                                   # write random TLB
        j       k1
        rfe
-END(MIPSX(kernel_tlb_miss))
+END(MIPSX(kern_tlb_miss))
 
 #if 0
 /*----------------------------------------------------------------------------
@@ -1710,8 +1710,8 @@
        ####
        PTR_WORD _C_LABEL(MIPSX(kern_intr))     # 0 external interrupt
        PTR_WORD _C_LABEL(MIPSX(kern_gen_exception))# 1 TLB modification
-       PTR_WORD _C_LABEL(MIPSX(kernel_tlb_miss))       # 2 TLB miss (LW/I-fetch)
-       PTR_WORD _C_LABEL(MIPSX(kernel_tlb_miss))       # 3 TLB miss (SW)
+       PTR_WORD _C_LABEL(MIPSX(kern_tlb_miss)) # 2 TLB miss (LW/I-fetch)
+       PTR_WORD _C_LABEL(MIPSX(kern_tlb_miss)) # 3 TLB miss (SW)
        PTR_WORD _C_LABEL(MIPSX(kern_gen_exception))# 4 address error (LW/I-fetch)
        PTR_WORD _C_LABEL(MIPSX(kern_gen_exception))# 5 address error (SW)
        PTR_WORD _C_LABEL(MIPSX(kern_gen_exception))# 6 bus error (I-fetch)



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