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[src/trunk]: src/sys/arch/sandpoint/stand/altboot Make sure the device class ...



details:   https://anonhg.NetBSD.org/src/rev/f78eb109bf59
branches:  trunk
changeset: 763142:f78eb109bf59
user:      phx <phx%NetBSD.org@localhost>
date:      Thu Mar 10 21:11:49 2011 +0000

description:
Make sure the device class is IDE (class 0, subclass 1), before checking
the PCI interface for native/legacy mode. Different subclasses are always
assumed being in native mode. That makes the Acard IDE controller work.

New macros for PCI interface, revision and class.

diffstat:

 sys/arch/sandpoint/stand/altboot/brdsetup.c |   4 ++--
 sys/arch/sandpoint/stand/altboot/globals.h  |   8 ++++++--
 sys/arch/sandpoint/stand/altboot/pci.c      |  23 ++++++++++++-----------
 sys/arch/sandpoint/stand/altboot/pciide.c   |   5 +++--
 sys/arch/sandpoint/stand/altboot/stg.c      |   8 +++-----
 5 files changed, 26 insertions(+), 22 deletions(-)

diffs (177 lines):

diff -r 6a1702eca735 -r f78eb109bf59 sys/arch/sandpoint/stand/altboot/brdsetup.c
--- a/sys/arch/sandpoint/stand/altboot/brdsetup.c       Thu Mar 10 20:04:46 2011 +0000
+++ b/sys/arch/sandpoint/stand/altboot/brdsetup.c       Thu Mar 10 21:11:49 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: brdsetup.c,v 1.7 2011/03/06 18:22:13 phx Exp $ */
+/* $NetBSD: brdsetup.c,v 1.8 2011/03/10 21:11:49 phx Exp $ */
 
 /*-
  * Copyright (c) 2008 The NetBSD Foundation, Inc.
@@ -211,7 +211,7 @@
                /* VIA 686B southbridge at dev 22 */
                brdtype = BRD_ENCOREPP1;
        }
-       else if ((pcicfgread(dev11, PCI_CLASS_REG) >> 16) == PCI_CLASS_ETH) {
+       else if (PCI_CLASS(pcicfgread(dev11, PCI_CLASS_REG)) == PCI_CLASS_ETH) {
                /* ADMtek AN985 (tlp) or RealTek 8169S (re) at dev 11 */
                brdtype = BRD_KUROBOX;
        }
diff -r 6a1702eca735 -r f78eb109bf59 sys/arch/sandpoint/stand/altboot/globals.h
--- a/sys/arch/sandpoint/stand/altboot/globals.h        Thu Mar 10 20:04:46 2011 +0000
+++ b/sys/arch/sandpoint/stand/altboot/globals.h        Thu Mar 10 21:11:49 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: globals.h,v 1.8 2011/03/06 18:22:13 phx Exp $ */
+/* $NetBSD: globals.h,v 1.9 2011/03/10 21:11:49 phx Exp $ */
 
 #ifdef DEBUG
 #define        DPRINTF(x)      printf x
@@ -80,12 +80,16 @@
 void  pcicfgwrite(unsigned, int, unsigned);
 
 #define PCI_ID_REG                     0x00
-#define PCI_COMMAND_STATUS_REG         0x04
 #define  PCI_VENDOR(id)                        ((id) & 0xffff)
 #define  PCI_PRODUCT(id)               (((id) >> 16) & 0xffff)
 #define  PCI_VENDOR_INVALID            0xffff
 #define  PCI_DEVICE(v,p)               ((v) | ((p) << 16))
+#define PCI_COMMAND_STATUS_REG         0x04
 #define PCI_CLASS_REG                  0x08
+#define  PCI_CLASS(v)                  (((v) >> 16) & 0xffff)
+#define  PCI_SUBCLASS(v)               (((v) >> 16) & 0xff)
+#define  PCI_INTERFACE(v)              (((v) & 0xff00) >> 8)
+#define  PCI_REVISION(v)               ((v) & 0xff)
 #define  PCI_CLASS_PPB                 0x0604
 #define  PCI_CLASS_ETH                 0x0200
 #define  PCI_CLASS_SCSI                        0x0100
diff -r 6a1702eca735 -r f78eb109bf59 sys/arch/sandpoint/stand/altboot/pci.c
--- a/sys/arch/sandpoint/stand/altboot/pci.c    Thu Mar 10 20:04:46 2011 +0000
+++ b/sys/arch/sandpoint/stand/altboot/pci.c    Thu Mar 10 21:11:49 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pci.c,v 1.4 2011/02/14 06:21:29 nisimura Exp $ */
+/* $NetBSD: pci.c,v 1.5 2011/03/10 21:11:49 phx Exp $ */
 
 /*-
  * Copyright (c) 2007 The NetBSD Foundation, Inc.
@@ -190,25 +190,26 @@
        /* 0x00 */
 #ifdef DEBUG
        printf("%02d:%02d:%02d:", bus, dev, func);
-       val = cfgread(bus, dev, func, 0x00);
+       val = cfgread(bus, dev, func, PCI_ID_REG);
        printf(" chip %04x.%04x", val & 0xffff, val>>16);
        val = cfgread(bus, dev, func, 0x2c);
        printf(" card %04x.%04x", val & 0xffff, val>>16);
-       val = cfgread(bus, dev, func, 0x08);
+       val = cfgread(bus, dev, func, PCI_CLASS_REG);
        printf(" rev %02x class %02x.%02x.%02x",
-               val & 0xff, (val>>24), (val>>16) & 0xff, (val>>8) & 0xff);
-       val = cfgread(bus, dev, func, 0x0c);
+           PCI_REVISION(val), (val>>24), (val>>16) & 0xff,
+           PCI_INTERFACE(val));
+       val = cfgread(bus, dev, func, PCI_BHLC_REG);
        printf(" hdr %02x\n", (val>>16) & 0xff);
 #endif
 
        /* 0x04 */
-       val = cfgread(bus, dev, func, 0x04);
+       val = cfgread(bus, dev, func, PCI_COMMAND_STATUS_REG);
        val |= 0xffff0107; /* enable IO,MEM,MASTER,SERR */
        cfgwrite(bus, dev, func, 0x04, val);
 
        /* 0x0c */
        val = 0x80 << 8 | 0x08 /* 32B cache line */;
-       cfgwrite(bus, dev, func, 0x0c, val);
+       cfgwrite(bus, dev, func, PCI_BHLC_REG, val);
 
        /* 0x3c */
        val = cfgread(bus, dev, func, 0x3c) & ~0xff;
@@ -217,13 +218,13 @@
 
        /* skip legacy mode IDE controller BAR assignment */
        val = cfgread(bus, dev, func, PCI_CLASS_REG);
-       if ((val >> 16) == PCI_CLASS_IDE && ((val >> 8) & 0x05) == 0)
+       if (PCI_CLASS(val) == PCI_CLASS_IDE && (PCI_INTERFACE(val) & 0x05) == 0)
                return 0;
 
        memassign(bus, dev, func);
 
        /* descending toward PCI-PCI bridge */
-       if ((cfgread(bus, dev, func, 0x08) >> 16) == PCI_CLASS_PPB) {
+       if ((cfgread(bus, dev, func, PCI_CLASS_REG) >> 16) == PCI_CLASS_PPB) {
                unsigned new;
 
                /* 0x18 */
@@ -336,7 +337,7 @@
        unsigned class;
 
        class = cfgread(bus, dev, func, PCI_CLASS_REG);
-       return ((class >> 16) == (unsigned)data);
+       return PCI_CLASS(class) == (unsigned)data;
 }
 
 static int
@@ -352,7 +353,7 @@
                if (PCI_VENDOR(pciid) == 0)
                        continue;
                class = cfgread(bus, device, 0, PCI_CLASS_REG);
-               if ((class >> 16) == PCI_CLASS_PPB) {
+               if (PCI_CLASS(class) == PCI_CLASS_PPB) {
                        /* exploring bus beyond PCI-PCI bridge */
                        index = _pcilookup(bus + 1,
                                    match, data, list, index, limit);
diff -r 6a1702eca735 -r f78eb109bf59 sys/arch/sandpoint/stand/altboot/pciide.c
--- a/sys/arch/sandpoint/stand/altboot/pciide.c Thu Mar 10 20:04:46 2011 +0000
+++ b/sys/arch/sandpoint/stand/altboot/pciide.c Thu Mar 10 21:11:49 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pciide.c,v 1.4 2011/03/09 20:35:56 phx Exp $ */
+/* $NetBSD: pciide.c,v 1.5 2011/03/10 21:11:49 phx Exp $ */
 
 /*-
  * Copyright (c) 2008 The NetBSD Foundation, Inc.
@@ -81,7 +81,8 @@
        l->tag = tag;
 
        val = pcicfgread(tag, PCI_CLASS_REG);
-       native = ((val >> 8) & 05) != 0;
+       native = PCI_CLASS(val) != PCI_CLASS_IDE ||
+           (PCI_INTERFACE(val) & 05) != 0;
        if (native) {
                /* native, use BAR 01234 */
                l->bar[0] = pciiobase + (pcicfgread(tag, 0x10) &~ 01);
diff -r 6a1702eca735 -r f78eb109bf59 sys/arch/sandpoint/stand/altboot/stg.c
--- a/sys/arch/sandpoint/stand/altboot/stg.c    Thu Mar 10 20:04:46 2011 +0000
+++ b/sys/arch/sandpoint/stand/altboot/stg.c    Thu Mar 10 21:11:49 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: stg.c,v 1.2 2011/03/08 19:00:38 phx Exp $ */
+/* $NetBSD: stg.c,v 1.3 2011/03/10 21:11:50 phx Exp $ */
 
 /*-
  * Copyright (c) 2011 Frank Wille.
@@ -63,9 +63,7 @@
 #define R1_ER_MASK             0x3f0000        /* Rx error indication */
 
 #define STGE_DMACtrl           0x00
-#define  DMAC_RxDMAComplete    (1U << 3)
 #define  DMAC_RxDMAPollNow     (1U << 4)
-#define  DMAC_TxDMAComplete    (1U << 11)
 #define  DMAC_TxDMAPollNow     (1U << 12)
 #define STGE_TFDListPtrLo      0x10
 #define STGE_TFDListPtrHi      0x14
@@ -149,7 +147,7 @@
 
        v = pcicfgread(tag, PCI_ID_REG);
        switch (v) {
-       case PCI_DEVICE(0x13f0, 0x1023):        /* ST1023 */
+       case PCI_DEVICE(0x13f0, 0x1023):        /* ST1023, IP1000A */
                return 1;
        }
        return 0;
@@ -257,7 +255,7 @@
        CSR_WRITE_4(l, STGE_MACCtrl, 0);        /* do IFSSelect(0) first */
        macctl = MC_StatisticsDisable | MC_TxEnable | MC_RxEnable;
 
-       if ((pcicfgread(tag, PCI_CLASS_REG) & 0xff) >= 6) {
+       if (PCI_REVISION(pcicfgread(tag, PCI_CLASS_REG)) >= 6) {
                /* some workarounds for revisions >= 6 */
                CSR_WRITE_2(l, STGE_DebugCtrl,
                    CSR_READ_2(l, STGE_DebugCtrl) | 0x0200);



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