[src/trunk]: src/sys/arch/arm add MPCore to CPU-ID table

[bsh <bsh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/09700e31e124
branches:  trunk
changeset: 763092:09700e31e124
user:      bsh <bsh%NetBSD.org@localhost>
date:      Thu Mar 10 08:06:27 2011 +0000

description:
add MPCore to CPU-ID table
add branch predict bit to arm11_options

diffstat:

 sys/arch/arm/arm/cpufunc.c |  6 ++++--
 sys/arch/arm/arm32/cpu.c   |  7 +++++--
 2 files changed, 9 insertions(+), 4 deletions(-)

diffs (55 lines):

diff -r a8f0c245cf83 -r 09700e31e124 sys/arch/arm/arm/cpufunc.c
--- a/sys/arch/arm/arm/cpufunc.c        Thu Mar 10 07:47:14 2011 +0000
+++ b/sys/arch/arm/arm/cpufunc.c        Thu Mar 10 08:06:27 2011 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc.c,v 1.102 2011/03/10 07:47:14 bsh Exp $        */
+/*     $NetBSD: cpufunc.c,v 1.103 2011/03/10 08:06:27 bsh Exp $        */
 
 /*
  * arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -49,7 +49,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.102 2011/03/10 07:47:14 bsh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.103 2011/03/10 08:06:27 bsh Exp $");
 
 #include "opt_compat_netbsd.h"
 #include "opt_cpuoptions.h"
@@ -2648,6 +2648,8 @@
        { "arm11.cache",        BIC, OR,  (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
        { "arm11.icache",       BIC, OR,  CPU_CONTROL_IC_ENABLE },
        { "arm11.dcache",       BIC, OR,  CPU_CONTROL_DC_ENABLE },
+       { "cpu.branchpredict",  BIC, OR,  CPU_CONTROL_BPRD_ENABLE },
+       { "arm11.branchpredict", BIC, OR,  CPU_CONTROL_BPRD_ENABLE },
        { NULL,                 IGN, IGN, 0 }
 };
 
diff -r a8f0c245cf83 -r 09700e31e124 sys/arch/arm/arm32/cpu.c
--- a/sys/arch/arm/arm32/cpu.c  Thu Mar 10 07:47:14 2011 +0000
+++ b/sys/arch/arm/arm32/cpu.c  Thu Mar 10 08:06:27 2011 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpu.c,v 1.77 2010/10/02 05:37:58 kiyohara Exp $        */
+/*     $NetBSD: cpu.c,v 1.78 2011/03/10 08:07:08 bsh Exp $     */
 
 /*
  * Copyright (c) 1995 Mark Brinicombe.
@@ -46,7 +46,7 @@
 
 #include <sys/param.h>
 
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.77 2010/10/02 05:37:58 kiyohara Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.78 2011/03/10 08:07:08 bsh Exp $");
 
 #include <sys/systm.h>
 #include <sys/malloc.h>
@@ -412,6 +412,9 @@
        { CPU_ID_ARM1176JS,     CPU_CLASS_ARM11J,       "ARM1176J-S r0",
          pN_steppings },
 
+       { CPU_ID_ARM11MPCORE,   CPU_CLASS_ARM11J,       "ARM11 MPCore",
+         generic_steppings },
+
        { CPU_ID_CORTEXA8R1,    CPU_CLASS_CORTEX,       "Cortex-A8 r1",
          pN_steppings },
        { CPU_ID_CORTEXA8R2,    CPU_CLASS_CORTEX,       "Cortex-A8 r2",