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[src/trunk]: src/sys/arch/mips/rmi - fix RCSID



details:   https://anonhg.NetBSD.org/src/rev/0792ab811490
branches:  trunk
changeset: 764216:0792ab811490
user:      cliff <cliff%NetBSD.org@localhost>
date:      Thu Apr 14 05:20:08 2011 +0000

description:
- fix RCSID
- add rmixl_eirr_ack() to ack the EIRR, using COP0_SYNC & JR_HB_RA as needed
- in rmixl_cpu_trampoline, remove old KSEG0 address reconstruction
of trampoline args pointer, and comment/explain the new way
- also in rmixl_cpu_trampoline, remove old watchpoint hack used for debugging

diffstat:

 sys/arch/mips/rmi/rmixl_subr.S |  55 +++++++++++++++++++++++++----------------
 1 files changed, 33 insertions(+), 22 deletions(-)

diffs (103 lines):

diff -r 63ad724acb55 -r 0792ab811490 sys/arch/mips/rmi/rmixl_subr.S
--- a/sys/arch/mips/rmi/rmixl_subr.S    Thu Apr 14 05:16:54 2011 +0000
+++ b/sys/arch/mips/rmi/rmixl_subr.S    Thu Apr 14 05:20:08 2011 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: rmixl_subr.S,v 1.3 2011/02/20 07:48:37 matt Exp $      */
+/*     $NetBSD: rmixl_subr.S,v 1.4 2011/04/14 05:20:08 cliff Exp $     */
 
 /*-
  * Copyright (c) 2010 The NetBSD Foundation, Inc.
@@ -37,10 +37,13 @@
 #include <mips/asm.h>
 #include <mips/cpuregs.h>
 
-RCSID("$NetSBD$")
+RCSID("$NetBSD: rmixl_subr.S,v 1.4 2011/04/14 05:20:08 cliff Exp $");
 
 #include "assym.h"
 
+#define RMIXL_COP_0_EIRR       _(9), 6
+#define RMIXL_COP_0_EIMR       _(9), 7
+
        .set    push
         .set    noreorder
         .set    mips64
@@ -56,7 +59,7 @@
 #error O32 not supported
 #endif
        j       ra
-       mfcr    v0, a0
+        mfcr   v0, a0
 END(rmixl_mfcr)
 
 /*
@@ -69,9 +72,29 @@
 #error O32 not supported
 #endif
        j       ra
-       mtcr    a1, a0
+        mtcr   a1, a0
 END(rmixl_mtcr)
 
+/*
+ * void rmixl_eirr_ack(uint64_t eimr, uint64_t vecbit, uint64_t preserve)
+ *
+ *     ack in EIRR the irq we are about to handle
+ *     disable all interrupts to prevent a race that would allow
+ *     e.g. softints set from a higher interrupt getting
+ *     clobbered by the EIRR read-modify-write 
+ */
+LEAF(rmixl_eirr_ack)
+       dmtc0   zero, RMIXL_COP_0_EIMR  /* EIMR = 0 */
+       COP0_SYNC
+       dmfc0   a3, RMIXL_COP_0_EIRR    /* a3 = EIRR */
+       and     a3, a2                  /* a3 &= preserve */
+       or      a3, a1                  /* a3 |= vecbit */
+       dmtc0   a3, RMIXL_COP_0_EIRR    /* EIRR = a3 */
+       COP0_SYNC
+       dmtc0   a0, RMIXL_COP_0_EIMR    /* EIMR = eimr */
+       JR_HB_RA
+END(rmixl_eirr_ack)
+
 #ifdef MULTIPROCESSOR
 /*
  * rmixlfw_wakeup_cpu(func, args, mask, callback)
@@ -111,13 +134,13 @@
  */
 NESTED(rmixl_cpu_trampoline, CALLFRAME_SIZ, ra)
 #ifdef _LP64
+       /*
+        * reconstruct trampoline args addr:
+        * sign-extend 32 bit KSEG0 address in a0
+        * to make proper 64 bit KSEG0 addr
+        */
+       sll             s0, a0, 0
        li              t0, MIPS_SR_KX
-#if 0
-       li              t1, MIPS_KSEG0_START    /* reconstruct presumed upper half ... */
-       or              s0, a0, t1              /* ... of trampoline args addr */
-#else
-       sll             s0, a0, 0
-#endif
 #else
        li              t0, 0
 #endif
@@ -132,18 +155,6 @@
        mtc0            t0, $15, 1      /* MIPS_COP_0_EBASE */
 
        /*
-        * Set up a watch exception if we try to execute from cpu_info.
-        */     
-       lui             t0, %hi(0x40000000)     /* global bit */
-       ori             t0, PAGE_SIZE-1
-       mtc0            t0, MIPS_COP_0_WATCH_HI 
-
-       REG_L           t0, 2*SZREG(s0)         /* XXX ta_cpuinfo */
-       dmtc0           t0, $22, 1
-       ori             t0, 4
-       dmtc0           t0, MIPS_COP_0_WATCH_LO
-
-       /*
         * load our stack pointer from trampoline args
         */
        REG_L           sp, 0*SZREG(s0)         /* XXX ta_sp */



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