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[src/trunk]: src/sys/arch/m68k Use #ifdef CACHE_HAVE_VAC rather than #ifdef M...
details: https://anonhg.NetBSD.org/src/rev/a813c2a9553b
branches: trunk
changeset: 760514:a813c2a9553b
user: tsutsui <tsutsui%NetBSD.org@localhost>
date: Thu Jan 06 13:49:16 2011 +0000
description:
Use #ifdef CACHE_HAVE_VAC rather than #ifdef M68K_MMU_HP where
the pmap code indends.
(though currently only MMU_HP machines have VAC in pmap_motorola ports)
diffstat:
sys/arch/m68k/include/pmap_motorola.h | 4 +-
sys/arch/m68k/m68k/pmap_motorola.c | 46 +++++++++++++++++-----------------
2 files changed, 25 insertions(+), 25 deletions(-)
diffs (224 lines):
diff -r 7279a4ccf839 -r a813c2a9553b sys/arch/m68k/include/pmap_motorola.h
--- a/sys/arch/m68k/include/pmap_motorola.h Thu Jan 06 13:42:45 2011 +0000
+++ b/sys/arch/m68k/include/pmap_motorola.h Thu Jan 06 13:49:16 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap_motorola.h,v 1.31 2011/01/02 05:21:11 tsutsui Exp $ */
+/* $NetBSD: pmap_motorola.h,v 1.32 2011/01/06 13:49:16 tsutsui Exp $ */
/*
* Copyright (c) 1991, 1993
@@ -246,7 +246,7 @@
#if defined(M68040) || defined(M68060)
extern u_int protostfree;
#endif
-#ifdef M68K_MMU_HP
+#ifdef CACHE_HAVE_VAC
extern u_int pmap_aliasmask;
#endif
diff -r 7279a4ccf839 -r a813c2a9553b sys/arch/m68k/m68k/pmap_motorola.c
--- a/sys/arch/m68k/m68k/pmap_motorola.c Thu Jan 06 13:42:45 2011 +0000
+++ b/sys/arch/m68k/m68k/pmap_motorola.c Thu Jan 06 13:49:16 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap_motorola.c,v 1.58 2011/01/02 05:21:11 tsutsui Exp $ */
+/* $NetBSD: pmap_motorola.c,v 1.59 2011/01/06 13:49:17 tsutsui Exp $ */
/*-
* Copyright (c) 1999 The NetBSD Foundation, Inc.
@@ -119,7 +119,7 @@
#include "opt_m68k_arch.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap_motorola.c,v 1.58 2011/01/02 05:21:11 tsutsui Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap_motorola.c,v 1.59 2011/01/06 13:49:17 tsutsui Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -270,7 +270,7 @@
TAILQ_HEAD(pv_page_list, pv_page) pv_page_freelist;
int pv_nfree;
-#ifdef M68K_MMU_HP
+#ifdef CACHE_HAVE_VAC
u_int pmap_aliasmask; /* seperation at which VA aliasing ok */
#endif
#if defined(M68040) || defined(M68060)
@@ -913,7 +913,7 @@
vaddr_t nssva;
pt_entry_t *pte;
int flags;
-#ifdef M68K_MMU_HP
+#ifdef CACHE_HAVE_VAC
bool firstpage = true, needcflush = false;
#endif
@@ -944,7 +944,7 @@
}
if (pmap_pte_v(pte)) {
-#ifdef M68K_MMU_HP
+#ifdef CACHE_HAVE_VAC
if (pmap_aliasmask) {
/*
@@ -976,7 +976,7 @@
}
}
-#ifdef M68K_MMU_HP
+#ifdef CACHE_HAVE_VAC
/*
* Didn't do anything, no need for cache flushes
@@ -1111,7 +1111,7 @@
pte = pmap_pte(pmap, sva);
while (sva < nssva) {
if (pmap_pte_v(pte) && pmap_pte_prot_chg(pte, isro)) {
-#ifdef M68K_MMU_HP
+#ifdef CACHE_HAVE_VAC
/*
* Purge kernel side of VAC to ensure we
@@ -1313,7 +1313,7 @@
npv->pv_ptpmap = NULL;
pv->pv_next = npv;
-#ifdef M68K_MMU_HP
+#ifdef CACHE_HAVE_VAC
/*
* Since there is another logical mapping for the
@@ -1391,7 +1391,7 @@
pmap->pm_stats.wired_count++;
validate:
-#ifdef M68K_MMU_HP
+#ifdef CACHE_HAVE_VAC
/*
* Purge kernel side of VAC to ensure we get correct state
* of HW bits so we don't clobber them.
@@ -1448,7 +1448,7 @@
*pte = npte;
if (!wired && active_pmap(pmap))
TBIS(va);
-#ifdef M68K_MMU_HP
+#ifdef CACHE_HAVE_VAC
/*
* The following is executed if we are entering a second
* (or greater) mapping for a physical page and the mappings
@@ -1537,14 +1537,14 @@
pt_entry_t *pte;
vaddr_t nssva;
vaddr_t eva = va + size;
-#ifdef M68K_MMU_HP
+#ifdef CACHE_HAVE_VAC
bool firstpage, needcflush;
#endif
PMAP_DPRINTF(PDB_FOLLOW|PDB_REMOVE|PDB_PROTECT,
("pmap_kremove(%lx, %lx)\n", va, size));
-#ifdef M68K_MMU_HP
+#ifdef CACHE_HAVE_VAC
firstpage = true;
needcflush = false;
#endif
@@ -1574,7 +1574,7 @@
va += PAGE_SIZE;
continue;
}
-#ifdef M68K_MMU_HP
+#ifdef CACHE_HAVE_VAC
if (pmap_aliasmask) {
/*
@@ -1605,7 +1605,7 @@
}
}
-#ifdef M68K_MMU_HP
+#ifdef CACHE_HAVE_VAC
/*
* In a couple of cases, we don't need to worry about flushing
@@ -1874,7 +1874,7 @@
PMAP_DPRINTF(PDB_FOLLOW, ("pmap_zero_page(%lx)\n", phys));
npte = phys | PG_V;
-#ifdef M68K_MMU_HP
+#ifdef CACHE_HAVE_VAC
if (pmap_aliasmask) {
/*
@@ -1932,7 +1932,7 @@
npte1 = src | PG_RO | PG_V;
npte2 = dst | PG_V;
-#ifdef M68K_MMU_HP
+#ifdef CACHE_HAVE_VAC
if (pmap_aliasmask) {
/*
@@ -2051,7 +2051,7 @@
return m68k_ptob(ppn);
}
-#ifdef M68K_MMU_HP
+#ifdef CACHE_HAVE_VAC
/*
* pmap_prefer: [ INTERFACE ]
*
@@ -2074,7 +2074,7 @@
*vap = va + d;
}
}
-#endif /* M68K_MMU_HP */
+#endif /* CACHE_HAVE_VAC */
/*
* Miscellaneous support routines follow
@@ -2123,7 +2123,7 @@
return;
}
-#ifdef M68K_MMU_HP
+#ifdef CACHE_HAVE_VAC
if (pmap_aliasmask && (flags & PRM_CFLUSH)) {
/*
@@ -2281,7 +2281,7 @@
pv = &pvh->pvh_first;
}
-#ifdef M68K_MMU_HP
+#ifdef CACHE_HAVE_VAC
/*
* If only one mapping left we no longer need to cache inhibit
@@ -2411,7 +2411,7 @@
return true;
}
-#ifdef M68K_MMU_HP
+#ifdef CACHE_HAVE_VAC
/*
* Flush VAC to get correct state of any hardware maintained bits.
@@ -2455,7 +2455,7 @@
pt_entry_t *pte, npte;
vaddr_t va;
int s;
-#if defined(M68K_MMU_HP) || defined(M68040) || defined(M68060)
+#if defined(CACHE_HAVE_VAC) || defined(M68040) || defined(M68060)
bool firstpage = true;
#endif
bool r;
@@ -2489,7 +2489,7 @@
#endif
va = pv->pv_va;
pte = pmap_pte(pv->pv_pmap, va);
-#ifdef M68K_MMU_HP
+#ifdef CACHE_HAVE_VAC
/*
* Flush VAC to ensure we get correct state of HW bits
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