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[src/trunk]: src/sys/arch/hp700/include Change struct cpu_info layout to impr...
details: https://anonhg.NetBSD.org/src/rev/81ae32244a5a
branches: trunk
changeset: 755388:81ae32244a5a
user: skrll <skrll%NetBSD.org@localhost>
date: Fri Jun 04 06:36:34 2010 +0000
description:
Change struct cpu_info layout to improve cache footprint. From OpenBSD.
diffstat:
sys/arch/hp700/include/cpu.h | 14 ++++++++++----
1 files changed, 10 insertions(+), 4 deletions(-)
diffs (36 lines):
diff -r 02cdc62b2b51 -r 81ae32244a5a sys/arch/hp700/include/cpu.h
--- a/sys/arch/hp700/include/cpu.h Fri Jun 04 06:31:50 2010 +0000
+++ b/sys/arch/hp700/include/cpu.h Fri Jun 04 06:36:34 2010 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.47 2010/06/01 10:20:29 skrll Exp $ */
+/* $NetBSD: cpu.h,v 1.48 2010/06/04 06:36:34 skrll Exp $ */
/* $OpenBSD: cpu.h,v 1.55 2008/07/23 17:39:35 kettenis Exp $ */
@@ -220,7 +220,15 @@
#define cpu_need_proftick(l) ((l)->l_pflag |= LP_OWEUPC, setsoftast(l))
#include <sys/cpu_data.h>
+
+/*
+ * Note that the alignment of ci_trap_save is important since we want to keep
+ * it within a single cache line. As a result, it must be kept as the first
+ * entry within the cpu_info struct.
+ */
struct cpu_info {
+ register_t ci_trapsave[16];/* the "phys" part of frame */
+
struct cpu_data ci_data; /* MI per-cpu data */
struct lwp *ci_curlwp; /* CPU owner */
@@ -232,9 +240,7 @@
volatile int ci_cpl;
volatile int ci_ipending; /* The pending interrupts. */
u_int ci_intr_depth; /* Nonzero iff running an interrupt. */
-
- register_t ci_trapsave[16];/* the "phys" part of frame */
-};
+} __aligned(64);
extern struct cpu_info cpu_info_store;
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