[src/trunk]: src/sys/arch/sparc64/dev enable the tomatillo iocache.

[mrg <mrg%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/eca583b49bee
branches:  trunk
changeset: 763459:eca583b49bee
user:      mrg <mrg%NetBSD.org@localhost>
date:      Sun Mar 20 20:43:34 2011 +0000

description:
enable the tomatillo iocache.
garbage collect struct iommureg_schizo and use struct iommureg2.

diffstat:

 sys/arch/sparc64/dev/schizo.c    |  21 ++++++++++-----------
 sys/arch/sparc64/dev/schizoreg.h |  18 +++---------------
 2 files changed, 13 insertions(+), 26 deletions(-)

diffs (89 lines):

diff -r 9d06af6aff8b -r eca583b49bee sys/arch/sparc64/dev/schizo.c
--- a/sys/arch/sparc64/dev/schizo.c     Sun Mar 20 20:42:06 2011 +0000
+++ b/sys/arch/sparc64/dev/schizo.c     Sun Mar 20 20:43:34 2011 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: schizo.c,v 1.17 2011/01/02 10:43:18 mrg Exp $  */
+/*     $NetBSD: schizo.c,v 1.18 2011/03/20 20:43:34 mrg Exp $  */
 /*     $OpenBSD: schizo.c,v 1.55 2008/08/18 20:29:37 brad Exp $        */
 
 /*
@@ -299,21 +299,20 @@
        schizo_set_intr(sc, pbm, PIL_HIGH, schizo_safari_error, sc,
            SCZ_SERR_INO, "safari");
 
-#if 0
        if (sc->sc_tomatillo) {
                /*
-                * We should enable the IOCACHE here.
+                * Enable the IOCACHE.
                 */
                uint64_t iocache_csr;
-               char bits[128];
-
-               iocache_csr = schizo_pbm_read(pbm, SCZ_PCI_IOCACHE_CSR);
 
-               snprintb(bits, sizeof(bits), TOM_IOCACHE_CSR_BITS, iocache_csr);
-               printf("IOCACHE_CSR=%s\n", bits);
-               printf("IOCACHE_CSR=%" PRIx64 "\n", iocache_csr);
+               iocache_csr = TOM_IOCACHE_CSR_WRT_PEN |
+                             (1 << TOM_IOCACHE_CSR_POFFSET_SHIFT) |
+                             TOM_IOCACHE_CSR_PEN_RDM |
+                             TOM_IOCACHE_CSR_PEN_ONE |
+                             TOM_IOCACHE_CSR_PEN_LINE;
+
+               schizo_pbm_write(pbm, SCZ_PCI_IOCACHE_CSR, iocache_csr);
        }
-#endif
 
        config_found(&sc->sc_dv, &pba, schizo_print);
 }
@@ -424,7 +423,7 @@
        is->is_bustag = pbm->sp_regt;
        bus_space_subregion(is->is_bustag, pbm->sp_regh,
                offsetof(struct schizo_pbm_regs, iommu),
-               sizeof(struct schizo_iommureg),
+               sizeof(struct iommureg2),
                &is->is_iommu);
 
        /*
diff -r 9d06af6aff8b -r eca583b49bee sys/arch/sparc64/dev/schizoreg.h
--- a/sys/arch/sparc64/dev/schizoreg.h  Sun Mar 20 20:42:06 2011 +0000
+++ b/sys/arch/sparc64/dev/schizoreg.h  Sun Mar 20 20:43:34 2011 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: schizoreg.h,v 1.7 2011/01/02 10:43:18 mrg Exp $        */
+/*     $NetBSD: schizoreg.h,v 1.8 2011/03/20 20:43:34 mrg Exp $        */
 /*     $OpenBSD: schizoreg.h,v 1.20 2008/07/12 13:08:04 kettenis Exp $ */
 
 /*
@@ -28,22 +28,9 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
-/* XXX merge with iommureg.h */
-/* iommmu registers */
-struct schizo_iommureg {
-       volatile u_int64_t      iommu_cr;       /* IOMMU control register */
-       volatile u_int64_t      iommu_tsb;      /* IOMMU TSB base register */
-       volatile u_int64_t      iommu_flush;    /* IOMMU flush register */
-       volatile u_int64_t      iommu_ctxflush;
-       volatile u_int64_t      iommu_reserved[28];
-       volatile u_int64_t      iommu_cache_flush;
-       volatile u_int64_t      iommu_cache_invalidate;
-       volatile u_int64_t      iommu_reserved2[30];
-};
-
 struct schizo_pbm_regs {
        volatile u_int64_t      _unused1[64];           /* 0x0000 - 0x01ff */
-       struct schizo_iommureg  iommu;                  /* 0x0200 - 0x03ff */
+       struct iommureg2        iommu;                  /* 0x0200 - 0x03ff */
        volatile u_int64_t      _unused2[384];
        volatile u_int64_t      imap[64];
        volatile u_int64_t      _unused3[64];
@@ -260,6 +247,7 @@
 #define        TOM_IOCACHE_CSR_NCP_RDM         (1UL << 18UL)   /* memory read multiple (NC) */
 #define        TOM_IOCACHE_CSR_NCP_ONE         (1UL << 17UL)   /* memory read (NC) */
 #define        TOM_IOCACHE_CSR_NCP_LINE        (1UL << 16UL)   /* memory read line (NC) */
+#define        TOM_IOCACHE_CSR_POFFSET_SHIFT   (1UL << 3UL)    /* prefetch offset */
 #define        TOM_IOCACHE_CSR_PEN_RDM         (1UL << 2UL)    /* memory read multiple */
 #define        TOM_IOCACHE_CSR_PEN_ONE         (1UL << 1UL)    /* memory read */
 #define        TOM_IOCACHE_CSR_PEN_LINE        (1UL << 0UL)    /* memory read line */