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[src/trunk]: src/sys/arch/powerpc eieio is implemented as sync on 40x. Theref...



details:   https://anonhg.NetBSD.org/src/rev/e3afef40cda2
branches:  trunk
changeset: 744978:e3afef40cda2
user:      rin <rin%NetBSD.org@localhost>
date:      Thu Feb 20 05:10:01 2020 +0000

description:
eieio is implemented as sync on 40x. Therefore, "sync; eieio" and
"eieio; sync" can be replaced by a single sync.

diffstat:

 sys/arch/powerpc/include/pio.h      |  51 +++++++++++++++++++++---------------
 sys/arch/powerpc/pic/intr.c         |  25 ++++++++++++-----
 sys/arch/powerpc/powerpc/bus_dma.c  |  10 +++++--
 sys/arch/powerpc/powerpc/pio_subr.S |   6 +++-
 4 files changed, 59 insertions(+), 33 deletions(-)

diffs (truncated from 342 to 300 lines):

diff -r 696bf9d9e4f3 -r e3afef40cda2 sys/arch/powerpc/include/pio.h
--- a/sys/arch/powerpc/include/pio.h    Thu Feb 20 05:03:54 2020 +0000
+++ b/sys/arch/powerpc/include/pio.h    Thu Feb 20 05:10:01 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pio.h,v 1.7 2012/01/30 23:34:58 matt Exp $ */
+/*     $NetBSD: pio.h,v 1.8 2020/02/20 05:10:01 rin Exp $ */
 /*     $OpenBSD: pio.h,v 1.1 1997/10/13 10:53:47 pefo Exp $ */
 
 /*
@@ -39,6 +39,13 @@
  * I/O macros.
  */
 
+#if defined(PPC_IBM4XX) && !defined(PPC_IBM440)
+/* eieio is implemented as sync */
+#define IO_BARRIER() __asm volatile("sync")
+#else
+#define IO_BARRIER() __asm volatile("eieio; sync")
+#endif
+
 static __inline void __outb(volatile uint8_t *a, uint8_t v);
 static __inline void __outw(volatile uint16_t *a, uint16_t v);
 static __inline void __outl(volatile uint32_t *a, uint32_t v);
@@ -64,35 +71,35 @@
 __outb(volatile uint8_t *a, uint8_t v)
 {
        *a = v;
-       __asm volatile("eieio; sync");
+       IO_BARRIER();
 }
 
 static __inline void
 __outw(volatile uint16_t *a, uint16_t v)
 {
        *a = v;
-       __asm volatile("eieio; sync");
+       IO_BARRIER();
 }
 
 static __inline void
 __outl(volatile uint32_t *a, uint32_t v)
 {
        *a = v;
-       __asm volatile("eieio; sync");
+       IO_BARRIER();
 }
 
 static __inline void
 __outwrb(volatile uint16_t *a, uint16_t v)
 {
        __asm volatile("sthbrx %0, 0, %1" :: "r"(v), "r"(a));
-       __asm volatile("eieio; sync");
+       IO_BARRIER();
 }
 
 static __inline void
 __outlrb(volatile uint32_t *a, uint32_t v)
 {
        __asm volatile("stwbrx %0, 0, %1" :: "r"(v), "r"(a));
-       __asm volatile("eieio; sync");
+       IO_BARRIER();
 }
 
 static __inline uint8_t
@@ -101,7 +108,7 @@
        uint8_t _v_;
 
        _v_ = *a;
-       __asm volatile("eieio; sync");
+       IO_BARRIER();
        return _v_;
 }
 
@@ -111,7 +118,7 @@
        uint16_t _v_;
 
        _v_ = *a;
-       __asm volatile("eieio; sync");
+       IO_BARRIER();
        return _v_;
 }
 
@@ -121,7 +128,7 @@
        uint32_t _v_;
 
        _v_ = *a;
-       __asm volatile("eieio; sync");
+       IO_BARRIER();
        return _v_;
 }
 
@@ -131,7 +138,7 @@
        uint16_t _v_;
 
        __asm volatile("lhbrx %0, 0, %1" : "=r"(_v_) : "r"(a));
-       __asm volatile("eieio; sync");
+       IO_BARRIER();
        return _v_;
 }
 
@@ -141,7 +148,7 @@
        uint32_t _v_;
 
        __asm volatile("lwbrx %0, 0, %1" : "=r"(_v_) : "r"(a));
-       __asm volatile("eieio; sync");
+       IO_BARRIER();
        return _v_;
 }
 
@@ -175,7 +182,7 @@
 {
        while (c--)
                *a = *s++;
-       __asm volatile("eieio; sync");
+       IO_BARRIER();
 }
 
 static __inline void
@@ -183,7 +190,7 @@
 {
        while (c--)
                *a = *s++;
-       __asm volatile("eieio; sync");
+       IO_BARRIER();
 }
 
 static __inline void
@@ -191,7 +198,7 @@
 {
        while (c--)
                *a = *s++;
-       __asm volatile("eieio; sync");
+       IO_BARRIER();
 }
 
 static __inline void
@@ -199,7 +206,7 @@
 {
        while (c--)
                __asm volatile("sthbrx %0, 0, %1" :: "r"(*s++), "r"(a));
-       __asm volatile("eieio; sync");
+       IO_BARRIER();
 }
 
 static __inline void
@@ -207,7 +214,7 @@
 {
        while (c--)
                __asm volatile("stwbrx %0, 0, %1" :: "r"(*s++), "r"(a));
-       __asm volatile("eieio; sync");
+       IO_BARRIER();
 }
 
 static __inline void
@@ -215,7 +222,7 @@
 {
        while (c--)
                *d++ = *a;
-       __asm volatile("eieio; sync");
+       IO_BARRIER();
 }
 
 static __inline void
@@ -223,7 +230,7 @@
 {
        while (c--)
                *d++ = *a;
-       __asm volatile("eieio; sync");
+       IO_BARRIER();
 }
 
 static __inline void
@@ -231,7 +238,7 @@
 {
        while (c--)
                *d++ = *a;
-       __asm volatile("eieio; sync");
+       IO_BARRIER();
 }
 
 static __inline void
@@ -239,7 +246,7 @@
 {
        while (c--)
                __asm volatile("lhbrx %0, 0, %1" : "=r"(*d++) : "r"(a));
-       __asm volatile("eieio; sync");
+       IO_BARRIER();
 }
 
 static __inline void
@@ -247,7 +254,7 @@
 {
        while (c--)
                __asm volatile("lwbrx %0, 0, %1" : "=r"(*d++) : "r"(a));
-       __asm volatile("eieio; sync");
+       IO_BARRIER();
 }
 
 #define        outsb(a,s,c)    (__outsb((volatile uint8_t *)(a), s, c))
@@ -274,4 +281,6 @@
 #define        inslrb(a,d,c)   (__inslrb((volatile uint32_t *)(a), d, c))
 #define        ins32rb(a,d,c)  inslrb(a,d,c)
 
+#undef IO_BARRIER
+
 #endif /*_POWERPC_PIO_H_*/
diff -r 696bf9d9e4f3 -r e3afef40cda2 sys/arch/powerpc/pic/intr.c
--- a/sys/arch/powerpc/pic/intr.c       Thu Feb 20 05:03:54 2020 +0000
+++ b/sys/arch/powerpc/pic/intr.c       Thu Feb 20 05:10:01 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: intr.c,v 1.26 2018/09/03 16:29:26 riastradh Exp $ */
+/*     $NetBSD: intr.c,v 1.27 2020/02/20 05:10:01 rin Exp $ */
 
 /*-
  * Copyright (c) 2007 Michael Lorenz
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.26 2018/09/03 16:29:26 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.27 2020/02/20 05:10:01 rin Exp $");
 
 #include "opt_interrupt.h"
 #include "opt_multiprocessor.h"
@@ -60,6 +60,13 @@
 
 #define        PIC_VIRQ_LEGAL_P(x)     ((u_int)(x) < NVIRQ)
 
+#if defined(PPC_IBM4XX) && !defined(PPC_IBM440)
+/* eieio is implemented as sync */
+#define REORDER_PROTECT() __asm volatile("sync")
+#else
+#define REORDER_PROTECT() __asm volatile("sync; eieio")
+#endif
+
 struct pic_ops *pics[MAX_PICS];
 int num_pics = 0;
 int max_base = 0;
@@ -608,11 +615,11 @@
        int ocpl;
 
        if (ncpl == ci->ci_cpl) return ncpl;
-       __asm volatile("sync; eieio");  /* don't reorder.... */
+       REORDER_PROTECT();
        ocpl = ci->ci_cpl;
        KASSERT(ncpl < NIPL);
        ci->ci_cpl = uimax(ncpl, ocpl);
-       __asm volatile("sync; eieio");  /* reorder protect */
+       REORDER_PROTECT();
        __insn_barrier();
        return ocpl;
 }
@@ -635,12 +642,12 @@
        struct cpu_info *ci = curcpu();
 
        __insn_barrier();
-       __asm volatile("sync; eieio");  /* reorder protect */
+       REORDER_PROTECT();
        ci->ci_cpl = ncpl;
        if (have_pending_intr_p(ci, ncpl))
                pic_do_pending_int();
 
-       __asm volatile("sync; eieio");  /* reorder protect */
+       REORDER_PROTECT();
 }
 
 int
@@ -650,12 +657,12 @@
        int ocpl;
 
        __insn_barrier();
-       __asm volatile("sync; eieio");  /* reorder protect */
+       REORDER_PROTECT();
        ocpl = ci->ci_cpl;
        ci->ci_cpl = ncpl;
        if (have_pending_intr_p(ci, ncpl))
                pic_do_pending_int();
-       __asm volatile("sync; eieio");  /* reorder protect */
+       REORDER_PROTECT();
        return ocpl;
 }
 
@@ -879,3 +886,5 @@
 {
        return EOPNOTSUPP;
 }
+
+#undef REORDER_PROTECT
diff -r 696bf9d9e4f3 -r e3afef40cda2 sys/arch/powerpc/powerpc/bus_dma.c
--- a/sys/arch/powerpc/powerpc/bus_dma.c        Thu Feb 20 05:03:54 2020 +0000
+++ b/sys/arch/powerpc/powerpc/bus_dma.c        Thu Feb 20 05:10:01 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: bus_dma.c,v 1.49 2018/09/03 16:29:26 riastradh Exp $   */
+/*     $NetBSD: bus_dma.c,v 1.50 2020/02/20 05:10:02 rin Exp $ */
 
 /*-
  * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
@@ -32,7 +32,7 @@
 
 #define _POWERPC_BUS_DMA_PRIVATE



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