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[src/netbsd-9]: src/sys/dev/ic Pull up following revision(s) (requested by ms...
details: https://anonhg.NetBSD.org/src/rev/d120b34525fc
branches: netbsd-9
changeset: 744260:d120b34525fc
user: martin <martin%NetBSD.org@localhost>
date: Tue Jan 28 11:12:30 2020 +0000
description:
Pull up following revision(s) (requested by msaitoh in ticket #667):
sys/dev/ic/rtl81x9var.h: revision 1.57
sys/dev/ic/rtl81x9.c: revision 1.107
sys/dev/ic/rtl81x9reg.h: revision 1.51
sys/dev/ic/rtl8169.c: revision 1.160
sys/dev/ic/rtl81x9reg.h: revision 1.52
sys/dev/ic/rtl8169.c: revision 1.161
Use unsigned in rtk_setmulti() to avoid undefined behavior. Found bk kUBSan.
8168H model didn't link up well. some models seems to require to enable TX/RX after configuration.
RTKQ_TXRXEN_LATER quirk flag added. it may be able to unify with RTKQ_RXDV_GATED flag?
Sort RTK_HWREV_* by value.
Improve some chip revisions support:
- Add 8168FP, 8411, 8168G, 8401E, 8105E, 8105E_SPIN1, 8106E and 8402 from
{Free,Open}BSD.
- Renumber RTK_HWREV_8103E from 0x24C00000 to 0x34c00000. 0x24C00000 is newly
used as RTK_HWREV_8102EL_SPIN1. Same as {Free,Open}BSD.
diffstat:
sys/dev/ic/rtl8169.c | 41 ++++++++++++++++++++++++++++++++++++-----
sys/dev/ic/rtl81x9.c | 8 ++++----
sys/dev/ic/rtl81x9reg.h | 29 +++++++++++++++++++----------
sys/dev/ic/rtl81x9var.h | 3 ++-
4 files changed, 61 insertions(+), 20 deletions(-)
diffs (218 lines):
diff -r 75769236c9cb -r d120b34525fc sys/dev/ic/rtl8169.c
--- a/sys/dev/ic/rtl8169.c Tue Jan 28 11:09:27 2020 +0000
+++ b/sys/dev/ic/rtl8169.c Tue Jan 28 11:12:30 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rtl8169.c,v 1.159 2019/05/30 02:32:18 msaitoh Exp $ */
+/* $NetBSD: rtl8169.c,v 1.159.2.1 2020/01/28 11:12:30 martin Exp $ */
/*
* Copyright (c) 1997, 1998-2003
@@ -33,7 +33,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rtl8169.c,v 1.159 2019/05/30 02:32:18 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rtl8169.c,v 1.159.2.1 2020/01/28 11:12:30 martin Exp $");
/* $FreeBSD: /repoman/r/ncvs/src/sys/dev/re/if_re.c,v 1.20 2004/04/11 20:34:08 ru Exp $ */
/*
@@ -607,17 +607,24 @@
sc->sc_quirk |= RTKQ_NOJUMBO;
break;
case RTK_HWREV_8168E:
- case RTK_HWREV_8168H:
case RTK_HWREV_8168H_SPIN1:
sc->sc_quirk |= RTKQ_DESCV2 | RTKQ_NOEECMD |
RTKQ_MACSTAT | RTKQ_CMDSTOP | RTKQ_PHYWAKE_PM |
RTKQ_NOJUMBO;
break;
+ case RTK_HWREV_8168H:
+ case RTK_HWREV_8168FP:
+ sc->sc_quirk |= RTKQ_DESCV2 | RTKQ_NOEECMD |
+ RTKQ_MACSTAT | RTKQ_CMDSTOP | RTKQ_PHYWAKE_PM |
+ RTKQ_NOJUMBO | RTKQ_RXDV_GATED | RTKQ_TXRXEN_LATER;
+ break;
case RTK_HWREV_8168E_VL:
case RTK_HWREV_8168F:
+ case RTK_HWREV_8411:
sc->sc_quirk |= RTKQ_DESCV2 | RTKQ_NOEECMD |
RTKQ_MACSTAT | RTKQ_CMDSTOP | RTKQ_NOJUMBO;
break;
+ case RTK_HWREV_8168EP:
case RTK_HWREV_8168G:
case RTK_HWREV_8168G_SPIN1:
case RTK_HWREV_8168G_SPIN2:
@@ -633,9 +640,26 @@
break;
case RTK_HWREV_8102E:
case RTK_HWREV_8102EL:
+ case RTK_HWREV_8102EL_SPIN1:
+ sc->sc_quirk |= RTKQ_DESCV2 | RTKQ_NOEECMD |
+ RTKQ_MACSTAT | RTKQ_CMDSTOP | RTKQ_NOJUMBO;
+ break;
case RTK_HWREV_8103E:
sc->sc_quirk |= RTKQ_DESCV2 | RTKQ_NOEECMD |
- RTKQ_MACSTAT | RTKQ_CMDSTOP | RTKQ_NOJUMBO;
+ RTKQ_MACSTAT | RTKQ_CMDSTOP;
+ break;
+ case RTK_HWREV_8401E:
+ case RTK_HWREV_8105E:
+ case RTK_HWREV_8105E_SPIN1:
+ case RTK_HWREV_8106E:
+ sc->sc_quirk |= RTKQ_PHYWAKE_PM |
+ RTKQ_DESCV2 | RTKQ_NOEECMD | RTKQ_MACSTAT |
+ RTKQ_CMDSTOP;
+ break;
+ case RTK_HWREV_8402:
+ sc->sc_quirk |= RTKQ_PHYWAKE_PM |
+ RTKQ_DESCV2 | RTKQ_NOEECMD | RTKQ_MACSTAT |
+ RTKQ_CMDSTOP; /* CMDSTOP_WAIT_TXQ */
break;
default:
aprint_normal_dev(sc->sc_dev,
@@ -1873,7 +1897,8 @@
/*
* Enable transmit and receive.
*/
- CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_TX_ENB | RTK_CMD_RX_ENB);
+ if ((sc->sc_quirk & RTKQ_TXRXEN_LATER) == 0)
+ CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_TX_ENB | RTK_CMD_RX_ENB);
/*
* Set the initial TX and RX configuration.
@@ -1915,6 +1940,12 @@
rtk_setmulti(sc);
/*
+ * some chips require to enable TX/RX *AFTER* TX/RX configuration
+ */
+ if ((sc->sc_quirk & RTKQ_TXRXEN_LATER) != 0)
+ CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_TX_ENB | RTK_CMD_RX_ENB);
+
+ /*
* Enable interrupts.
*/
if (sc->re_testmode)
diff -r 75769236c9cb -r d120b34525fc sys/dev/ic/rtl81x9.c
--- a/sys/dev/ic/rtl81x9.c Tue Jan 28 11:09:27 2020 +0000
+++ b/sys/dev/ic/rtl81x9.c Tue Jan 28 11:12:30 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rtl81x9.c,v 1.106 2019/05/28 07:41:48 msaitoh Exp $ */
+/* $NetBSD: rtl81x9.c,v 1.106.2.1 2020/01/28 11:12:30 martin Exp $ */
/*
* Copyright (c) 1997, 1998
@@ -86,7 +86,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rtl81x9.c,v 1.106 2019/05/28 07:41:48 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rtl81x9.c,v 1.106.2.1 2020/01/28 11:12:30 martin Exp $");
#include <sys/param.h>
@@ -561,9 +561,9 @@
h = rtk_calchash(enm->enm_addrlo);
if (h < 32)
- hashes[0] |= (1 << h);
+ hashes[0] |= __BIT(h);
else
- hashes[1] |= (1 << (h - 32));
+ hashes[1] |= __BIT(h - 32);
mcnt++;
ETHER_NEXT_MULTI(step, enm);
}
diff -r 75769236c9cb -r d120b34525fc sys/dev/ic/rtl81x9reg.h
--- a/sys/dev/ic/rtl81x9reg.h Tue Jan 28 11:09:27 2020 +0000
+++ b/sys/dev/ic/rtl81x9reg.h Tue Jan 28 11:12:30 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rtl81x9reg.h,v 1.50 2019/04/05 23:46:04 uwe Exp $ */
+/* $NetBSD: rtl81x9reg.h,v 1.50.4.1 2020/01/28 11:12:30 martin Exp $ */
/*
* Copyright (c) 1997, 1998
@@ -149,7 +149,7 @@
#define RTK_TXCFG_IFG 0x03000000 /* interframe gap */
#define RTK_TXCFG_HWREV 0x7CC00000
-#define RTK_LOOPTEST_OFF 0x00000000
+#define RTK_LOOPTEST_OFF 0x00000000
#define RTK_LOOPTEST_ON 0x00020000
#define RTK_LOOPTEST_ON_CPLUS 0x00060000
@@ -159,40 +159,49 @@
#define RTK_HWREV_8169S 0x04000000
#define RTK_HWREV_8169_8110SB 0x10000000
#define RTK_HWREV_8169_8110SC 0x18000000
+#define RTK_HWREV_8401E 0x24000000
#define RTK_HWREV_8102EL 0x24800000
-#define RTK_HWREV_8103E 0x24C00000
+#define RTK_HWREV_8102EL_SPIN1 0x24C00000
#define RTK_HWREV_8168D 0x28000000
#define RTK_HWREV_8168DP 0x28800000
#define RTK_HWREV_8168E 0x2C000000
#define RTK_HWREV_8168E_VL 0x2C800000
#define RTK_HWREV_8168_SPIN1 0x30000000
-#define RTK_HWREV_8168G 0x4c000000
-#define RTK_HWREV_8168G_SPIN1 0x4c100000
-#define RTK_HWREV_8168G_SPIN2 0x50900000
-#define RTK_HWREV_8168G_SPIN4 0x5c800000
-#define RTK_HWREV_8168GU 0x50800000
#define RTK_HWREV_8100E 0x30800000
#define RTK_HWREV_8101E 0x34000000
#define RTK_HWREV_8102E 0x34800000
+#define RTK_HWREV_8103E 0x34c00000
#define RTK_HWREV_8168_SPIN2 0x38000000
#define RTK_HWREV_8168_SPIN3 0x38400000
#define RTK_HWREV_8100E_SPIN2 0x38800000
#define RTK_HWREV_8168C 0x3C000000
#define RTK_HWREV_8168C_SPIN2 0x3C400000
#define RTK_HWREV_8168CP 0x3C800000
+#define RTK_HWREV_8105E 0x40800000
+#define RTK_HWREV_8105E_SPIN1 0x40C00000
+#define RTK_HWREV_8402 0x44000000
+#define RTK_HWREV_8106E 0x44800000
#define RTK_HWREV_8168F 0x48000000
+#define RTK_HWREV_8411 0x48800000
+#define RTK_HWREV_8168G 0x4c000000
+#define RTK_HWREV_8168G_SPIN1 0x4c100000
+#define RTK_HWREV_8168EP 0x50000000
+#define RTK_HWREV_8168GU 0x50800000
+#define RTK_HWREV_8168G_SPIN2 0x50900000
#define RTK_HWREV_8168H 0x54000000
#define RTK_HWREV_8168H_SPIN1 0x54100000
+#define RTK_HWREV_8168FP 0x54800000
+#define RTK_HWREV_8168G_SPIN4 0x5c800000
#define RTK_HWREV_8139 0x60000000
#define RTK_HWREV_8139A 0x70000000
#define RTK_HWREV_8139AG 0x70800000
-#define RTK_HWREV_8139B 0x78000000
-#define RTK_HWREV_8130 0x7C000000
#define RTK_HWREV_8139C 0x74000000
#define RTK_HWREV_8139D 0x74400000
#define RTK_HWREV_8139CPLUS 0x74800000
#define RTK_HWREV_8101 0x74c00000
+#define RTK_HWREV_8139B 0x78000000
#define RTK_HWREV_8100 0x78800000
+#define RTK_HWREV_8130 0x7C000000
#define RTK_HWREV_8169_8110SBL 0x7cc00000
#define RTK_TXDMA_16BYTES 0x00000000
diff -r 75769236c9cb -r d120b34525fc sys/dev/ic/rtl81x9var.h
--- a/sys/dev/ic/rtl81x9var.h Tue Jan 28 11:09:27 2020 +0000
+++ b/sys/dev/ic/rtl81x9var.h Tue Jan 28 11:12:30 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rtl81x9var.h,v 1.56 2017/04/19 00:20:02 jmcneill Exp $ */
+/* $NetBSD: rtl81x9var.h,v 1.56.18.1 2020/01/28 11:12:30 martin Exp $ */
/*
* Copyright (c) 1997, 1998
@@ -194,6 +194,7 @@
#define RTKQ_PHYWAKE_PM 0x00000400 /* wake PHY from power down */
#define RTKQ_RXDV_GATED 0x00000800
#define RTKQ_IM_HW 0x00001000 /* HW interrupt mitigation */
+#define RTKQ_TXRXEN_LATER 0x00002000 /* TX/RX enable timing */
bus_dma_tag_t sc_dmat;
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