[src/trunk]: src/sys/arch/mips/alchemy/dev Do not reset GPIO2 block -- causes...

[gdamore <gdamore%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/9f194f514038
branches:  trunk
changeset: 588261:9f194f514038
user:      gdamore <gdamore%NetBSD.org@localhost>
date:      Mon Feb 13 04:30:47 2006 +0000

description:
Do not reset GPIO2 block -- causes PCI reset.

diffstat:

 sys/arch/mips/alchemy/dev/augpio.c    |  20 +++++++++-----------
 sys/arch/mips/alchemy/dev/augpioreg.h |   3 ++-
 2 files changed, 11 insertions(+), 12 deletions(-)

diffs (65 lines):

diff -r 2c885897ee21 -r 9f194f514038 sys/arch/mips/alchemy/dev/augpio.c
--- a/sys/arch/mips/alchemy/dev/augpio.c        Mon Feb 13 04:30:12 2006 +0000
+++ b/sys/arch/mips/alchemy/dev/augpio.c        Mon Feb 13 04:30:47 2006 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: augpio.c,v 1.1 2006/02/12 20:49:34 gdamore Exp $ */
+/* $NetBSD: augpio.c,v 1.2 2006/02/13 04:30:47 gdamore Exp $ */
 
 /*-
  * Copyright (c) 2006 Itronix Inc.
@@ -32,7 +32,7 @@
  */ 
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: augpio.c,v 1.1 2006/02/12 20:49:34 gdamore Exp $");
+__KERNEL_RCSID(0, "$NetBSD: augpio.c,v 1.2 2006/02/13 04:30:47 gdamore Exp $");
 
 #include <sys/types.h>
 #include <sys/param.h>
@@ -103,6 +103,7 @@
 
        printf(": Alchemy GPIO");
        if (aa->aa_addrs[0] == SYS_BASE) {
+
                for (pin = 0; pin < aa->aa_addrs[1]; pin++) {
 
                        sc->sc_pins[sc->sc_npins].pin_num = pin;
@@ -119,15 +120,12 @@
                printf(", primary block");
 
        } else if (aa->aa_addrs[0] == GPIO2_BASE) {
-
-               /* initialize GPIO2 block */
-               uint32_t        val;
-               val = AUGPIO_GPIO2_ENABLE_MR | AUGPIO_GPIO2_ENABLE_CE;
-               PUTREG(GPIO2_BASE + AUGPIO_GPIO2_ENABLE, val);
-               delay(10);
-               val &= ~AUGPIO_GPIO2_ENABLE_MR;
-               PUTREG(GPIO2_BASE + AUGPIO_GPIO2_ENABLE, val);
-
+               /*
+                * We rely on firmware (or platform init code) to initialize
+                * the GPIO2 block.  We can't do it ourselves, because
+                * resetting the GPIO2 block can have nasty effects (e.g.
+                * reset PCI bus...)
+                */
                for (pin = 0; pin < aa->aa_addrs[1]; pin++) {
                        sc->sc_pins[sc->sc_npins].pin_num = pin;
                        sc->sc_pins[sc->sc_npins].pin_caps =
diff -r 2c885897ee21 -r 9f194f514038 sys/arch/mips/alchemy/dev/augpioreg.h
--- a/sys/arch/mips/alchemy/dev/augpioreg.h     Mon Feb 13 04:30:12 2006 +0000
+++ b/sys/arch/mips/alchemy/dev/augpioreg.h     Mon Feb 13 04:30:47 2006 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: augpioreg.h,v 1.1 2006/02/12 20:49:34 gdamore Exp $ */
+/* $NetBSD: augpioreg.h,v 1.2 2006/02/13 04:30:47 gdamore Exp $ */
 
 /*-
  * Copyright (c) 2006 Itronix Inc.
@@ -37,6 +37,7 @@
 #define        AUGPIO_NPINS                    64
 
 /* SYS_GPIO registers -- offset from SYS_BASE */
+#define        AUGPIO_SYS_PINFUNC              0x02C
 #define        AUGPIO_SYS_TRIOUTRD             0x100
 #define        AUGPIO_SYS_TRIOUTCLR            0x100
 #define        AUGPIO_SYS_OUTPUTRD             0x108