[src/netbsd-2-0]: src/gnu/dist/gcc/gcc/config/sparc Pull up revision 1.7 (req...

[tron <tron%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/8bc17d2edef9
branches:  netbsd-2-0
changeset: 560734:8bc17d2edef9
user:      tron <tron%NetBSD.org@localhost>
date:      Wed May 05 15:35:34 2004 +0000

description:
Pull up revision 1.7 (requested by martin in ticket #246):
Bring in a change from gcc-current to fix double -> unsigned long
conversions and generally avoid 128 bit (emulated) floats in between.
This fixes heaps of problems in perl >= 5.7.1, where integer values
and unsigned values are separated by the interpreter.
Thu Feb 26 18:40:40 2004 UTC by ebotcazou:
        * config/sparc/sparc-protos.h (sparc_emit_floatunsdi): Add 'mode'.
        (sparc_emit_fixunsdi): New prototype.
        * config/sparc/sparc.c (sparc_emit_floatunsdi): Use 'mode' argument.
        (sparc_emit_fixunsdi): New function.
        * config/sparc/sparc.md (floatunsdisf2): Use 'general_operand' for
        operand 1.  Pass SFmode to sparc_emit_floatunsdi.
        (floatunsdidf2): Use 'general_operand' for operand 1.  Pass DFmode
        to sparc_emit_floatunsdi.
        (fixuns_truncsfdi2): New expander.
        (fixuns_truncdfdi2): Likewise.

diffstat:

 gnu/dist/gcc/gcc/config/sparc/sparc.md |  20 ++++++++++++++++----
 1 files changed, 16 insertions(+), 4 deletions(-)

diffs (53 lines):

diff -r 8d6d5894d946 -r 8bc17d2edef9 gnu/dist/gcc/gcc/config/sparc/sparc.md
--- a/gnu/dist/gcc/gcc/config/sparc/sparc.md    Wed May 05 15:35:14 2004 +0000
+++ b/gnu/dist/gcc/gcc/config/sparc/sparc.md    Wed May 05 15:35:34 2004 +0000
@@ -4637,9 +4637,9 @@
 
 (define_expand "floatunsdisf2"
   [(use (match_operand:SF 0 "register_operand" ""))
-   (use (match_operand:DI 1 "register_operand" ""))]
+   (use (match_operand:DI 1 "general_operand" ""))]
   "TARGET_ARCH64 && TARGET_FPU"
-  "sparc_emit_floatunsdi (operands); DONE;")
+  "sparc_emit_floatunsdi (operands, SFmode); DONE;")
 
 (define_insn "floatdidf2"
   [(set (match_operand:DF 0 "register_operand" "=e")
@@ -4651,9 +4651,9 @@
 
 (define_expand "floatunsdidf2"
   [(use (match_operand:DF 0 "register_operand" ""))
-   (use (match_operand:DI 1 "register_operand" ""))]
+   (use (match_operand:DI 1 "general_operand" ""))]
   "TARGET_ARCH64 && TARGET_FPU"
-  "sparc_emit_floatunsdi (operands); DONE;")
+  "sparc_emit_floatunsdi (operands, DFmode); DONE;")
 
 (define_expand "floatditf2"
   [(set (match_operand:TF 0 "nonimmediate_operand" "")
@@ -4722,6 +4722,12 @@
   [(set_attr "type" "fp")
    (set_attr "fptype" "double")])
 
+(define_expand "fixuns_truncsfdi2"
+  [(use (match_operand:DI 0 "register_operand" ""))
+   (use (match_operand:SF 1 "general_operand" ""))]
+  "TARGET_ARCH64 && TARGET_FPU"
+  "sparc_emit_fixunsdi (operands, SFmode); DONE;")
+
 (define_insn "fix_truncdfdi2"
   [(set (match_operand:DI 0 "register_operand" "=e")
        (fix:DI (fix:DF (match_operand:DF 1 "register_operand" "e"))))]
@@ -4730,6 +4736,12 @@
   [(set_attr "type" "fp")
    (set_attr "fptype" "double")])
 
+(define_expand "fixuns_truncdfdi2"
+  [(use (match_operand:DI 0 "register_operand" ""))
+   (use (match_operand:DF 1 "general_operand" ""))]
+  "TARGET_ARCH64 && TARGET_FPU"
+  "sparc_emit_fixunsdi (operands, DFmode); DONE;")
+
 (define_expand "fix_trunctfdi2"
   [(set (match_operand:DI 0 "register_operand" "")
        (fix:DI (match_operand:TF 1 "general_operand" "")))]