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[src/trunk]: src/sys/arch/mips/mips - in PMAP_IS_ACTIVE(), the kernel pmap is...



details:   https://anonhg.NetBSD.org/src/rev/cd87a76405bb
branches:  trunk
changeset: 514728:cd87a76405bb
user:      chs <chs%NetBSD.org@localhost>
date:      Sun Sep 09 19:48:12 2001 +0000

description:
- in PMAP_IS_ACTIVE(), the kernel pmap is always active, and we don't
   need to check for curproc being non-NULL since none of the pmap
   interfaces which are legal to use in interrupt handlers use this macro.
 - use the hit op when flushing the cache in pmap_kremove().
 - avoid trusting the optimizer in pmap_clear_reference().
 - fix pmap_clear_modify() to reset the mod-bit emulation so we can
   detect further modifications to the page, also flushing the cache
   for any mappings which might have dirty lines.

diffstat:

 sys/arch/mips/mips/pmap.c |  73 +++++++++++++++++++++++++++++++++++++---------
 1 files changed, 59 insertions(+), 14 deletions(-)

diffs (134 lines):

diff -r a2dd3e83cd54 -r cd87a76405bb sys/arch/mips/mips/pmap.c
--- a/sys/arch/mips/mips/pmap.c Sun Sep 09 19:38:22 2001 +0000
+++ b/sys/arch/mips/mips/pmap.c Sun Sep 09 19:48:12 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pmap.c,v 1.132 2001/09/01 17:08:19 chs Exp $   */
+/*     $NetBSD: pmap.c,v 1.133 2001/09/09 19:48:12 chs Exp $   */
 
 /*-
  * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc.
@@ -78,7 +78,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.132 2001/09/01 17:08:19 chs Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.133 2001/09/09 19:48:12 chs Exp $");
 
 /*
  *     Manages physical address maps.
@@ -204,7 +204,7 @@
            (pmap_initialized == TRUE && vm_physseg_find(atop(pa), NULL) != -1)
 
 #define PMAP_IS_ACTIVE(pm)     \
-           (curproc != NULL && (pm) == curproc->p_vmspace->vm_map.pmap)
+       ((pm) == pmap_kernel() || (pm) == curproc->p_vmspace->vm_map.pmap)
 
 #define        pa_to_pvh(pa)                                                   \
 ({                                                                     \
@@ -1363,7 +1363,6 @@
 {
        pt_entry_t *pte;
        vaddr_t eva;
-       paddr_t pa;
        u_int entry;
 
 #ifdef DEBUG
@@ -1379,11 +1378,7 @@
                        continue;
                }
                if (CPUISMIPS3) {
-                       MachFlushDCache(va, PAGE_SIZE);
-                       if (mips_L2CachePresent) {
-                               pa = mips_tlbpfn_to_paddr(entry);
-                               MachFlushDCache(pa, PAGE_SIZE);
-                       }
+                       MachHitFlushDCache(va, PAGE_SIZE);
                        pte->pt_entry = MIPS3_PG_NV | MIPS3_PG_G;
                } else {
                        pte->pt_entry = MIPS1_PG_NV;
@@ -1640,14 +1635,16 @@
        struct vm_page *pg;
 {
        paddr_t pa = VM_PAGE_TO_PHYS(pg);
+       int *attrp;
        boolean_t rv;
 
 #ifdef DEBUG
        if (pmapdebug & PDB_FOLLOW)
                printf("pmap_clear_reference(%lx)\n", pa);
 #endif
-       rv = *pa_to_attribute(pa) & PV_REFERENCED;
-       *pa_to_attribute(pa) &= ~PV_REFERENCED;
+       attrp = pa_to_attribute(pa);
+       rv = *attrp & PV_REFERENCED;
+       *attrp &= ~PV_REFERENCED;
        return rv;
 }
 
@@ -1674,15 +1671,63 @@
        struct vm_page *pg;
 {
        paddr_t pa = VM_PAGE_TO_PHYS(pg);
+       struct pmap *pmap;
+       struct pv_entry *pv;
+       pt_entry_t *pte;
+       int *attrp;
+       vaddr_t va;
+       unsigned asid;
        boolean_t rv;
 
 #ifdef DEBUG
        if (pmapdebug & PDB_FOLLOW)
                printf("pmap_clear_modify(%lx)\n", pa);
 #endif
-       rv = *pa_to_attribute(pa) & PV_MODIFIED;
-       *pa_to_attribute(pa) &= ~PV_MODIFIED;
-       return rv;
+       attrp = pa_to_attribute(pa);
+       rv = *attrp & PV_MODIFIED;
+       *attrp &= ~PV_MODIFIED;
+       if (!rv) {
+               return rv;
+       }
+       pv = pa_to_pvh(pa);
+       if (pv->pv_pmap == NULL) {
+               return TRUE;
+       }
+
+       /*
+        * remove write access from any pages that are dirty
+        * so we can tell if they are written to again later.
+        * flush the VAC first if there is one.
+        */
+
+       for (; pv; pv = pv->pv_next) {
+               pmap = pv->pv_pmap;
+               va = pv->pv_va;
+               if (pmap == pmap_kernel()) {
+                       pte = kvtopte(va);
+                       asid = 0;
+               } else {
+                       pte = pmap_segmap(pmap, va);
+                       KASSERT(pte);
+                       pte += ((va >> PGSHIFT) & (NPTEPG - 1));
+                       asid = pmap->pm_asid << MIPS_TLB_PID_SHIFT;
+               }
+               if ((pte->pt_entry & mips_pg_m_bit()) == 0) {
+                       continue;
+               }
+               if (CPUISMIPS3) {
+                       if (PMAP_IS_ACTIVE(pmap)) {
+                               MachHitFlushDCache(va, PAGE_SIZE);
+                       } else {
+                               MachFlushDCache(va, PAGE_SIZE);
+                       }
+               }
+               pte->pt_entry &= ~mips_pg_m_bit();
+               if (pmap->pm_asidgen == pmap_asid_generation) {
+                       MIPS_TBIS(va | asid);
+               }
+       }
+       return TRUE;
 }
 
 /*



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