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[src/trunk]: src/sys/arch/newsmips Rearrange splxxx (from pmax). Closes PR 8...
details: https://anonhg.NetBSD.org/src/rev/85147a47ef23
branches: trunk
changeset: 477238:85147a47ef23
user: tsubai <tsubai%NetBSD.org@localhost>
date: Sun Oct 17 15:06:45 1999 +0000
description:
Rearrange splxxx (from pmax). Closes PR 8445.
diffstat:
sys/arch/newsmips/include/autoconf.h | 5 +-
sys/arch/newsmips/include/intr.h | 84 ++++++++++++++++++-----------
sys/arch/newsmips/newsmips/autoconf.c | 6 +-
sys/arch/newsmips/newsmips/newsmips_trap.c | 45 +++++++++++----
4 files changed, 92 insertions(+), 48 deletions(-)
diffs (235 lines):
diff -r 6d99135e28a0 -r 85147a47ef23 sys/arch/newsmips/include/autoconf.h
--- a/sys/arch/newsmips/include/autoconf.h Sun Oct 17 10:18:15 1999 +0000
+++ b/sys/arch/newsmips/include/autoconf.h Sun Oct 17 15:06:45 1999 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: autoconf.h,v 1.3 1998/10/06 20:50:17 thorpej Exp $ */
+/* $NetBSD: autoconf.h,v 1.4 1999/10/17 15:06:45 tsubai Exp $ */
/*
* Copyright (c) 1994, 1995 Carnegie-Mellon University.
@@ -49,4 +49,5 @@
/* Locator aliases */
#define cf_addr cf_loc[0]
-int badaddr __P((void *, u_int));
+int news3400_badaddr __P((void *, u_int));
+#define badaddr news3400_badaddr
diff -r 6d99135e28a0 -r 85147a47ef23 sys/arch/newsmips/include/intr.h
--- a/sys/arch/newsmips/include/intr.h Sun Oct 17 10:18:15 1999 +0000
+++ b/sys/arch/newsmips/include/intr.h Sun Oct 17 15:06:45 1999 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: intr.h,v 1.3 1999/08/05 18:08:11 thorpej Exp $ */
+/* $NetBSD: intr.h,v 1.4 1999/10/17 15:06:45 tsubai Exp $ */
/*
* Copyright (c) 1998 Jonathan Stone. All rights reserved.
@@ -33,40 +33,57 @@
#ifndef _MACHINE_INTR_H_
#define _MACHINE_INTR_H_
-#define IPL_NONE 0 /* disable only this interrupt */
-#define IPL_BIO 1 /* disable block I/O interrupts */
-#define IPL_NET 2 /* disable network interrupts */
-#define IPL_TTY 3 /* disable terminal interrupts */
-#define IPL_CLOCK 4 /* disable clock interrupts */
-#define IPL_STATCLOCK 5 /* disable profiling interrupts */
-#define IPL_SERIAL 6 /* disable serial hardware interrupts */
-#define IPL_HIGH 7 /* disable all interrupts */
+#define IPL_NONE 0 /* disable only this interrupt */
+#define IPL_BIO 1 /* disable block I/O interrupts */
+#define IPL_NET 2 /* disable network interrupts */
+#define IPL_TTY 3 /* disable terminal interrupts */
+#define IPL_CLOCK 4 /* disable clock interrupts */
+#define IPL_STATCLOCK 5 /* disable profiling interrupts */
+#define IPL_SERIAL 6 /* disable serial hardware interrupts */
+#define IPL_HIGH 7 /* disable all interrupts */
+
+#ifdef _KERNEL
+#ifndef _LOCORE
+#include <mips/cpuregs.h>
-#ifndef _LOCORE
+extern int _splraise __P((int));
+extern int _spllower __P((int));
+extern int _splset __P((int));
+extern int _splget __P((void));
+extern void _splnone __P((void));
+extern void _setsoftintr __P((int));
+extern void _clrsoftintr __P((int));
+
+#define setsoftclock() _setsoftintr(MIPS_SOFT_INT_MASK_0)
+#define setsoftnet() _setsoftintr(MIPS_SOFT_INT_MASK_1)
+#define clearsoftclock() _clrsoftintr(MIPS_SOFT_INT_MASK_0)
+#define clearsoftnet() _clrsoftintr(MIPS_SOFT_INT_MASK_1)
-#define splbio cpu_spl0
-#define splnet cpu_spl1
-#define spltty cpu_spl1
-#define splimp cpu_spl1
-#define splclock cpu_spl2
-#define splstatclock cpu_spl2
-
-extern void setsoftnet __P((void)), clearsoftnet __P((void));
-extern void setsoftclock __P((void)), clearsoftclock __P((void));
+/*
+ * nesting interrupt masks.
+ */
+#define MIPS_INT_MASK_SPL_SOFT0 MIPS_SOFT_INT_MASK_0
+#define MIPS_INT_MASK_SPL_SOFT1 (MIPS_SOFT_INT_MASK_1|MIPS_INT_MASK_SPL_SOFT0)
+#define MIPS_INT_MASK_SPL0 (MIPS_INT_MASK_0|MIPS_INT_MASK_SPL_SOFT1)
+#define MIPS_INT_MASK_SPL1 (MIPS_INT_MASK_1|MIPS_INT_MASK_SPL0)
+#define MIPS_INT_MASK_SPL2 (MIPS_INT_MASK_2|MIPS_INT_MASK_SPL1)
+#define MIPS_INT_MASK_SPL3 (MIPS_INT_MASK_3|MIPS_INT_MASK_SPL2)
+#define MIPS_INT_MASK_SPL4 (MIPS_INT_MASK_4|MIPS_INT_MASK_SPL3)
+#define MIPS_INT_MASK_SPL5 (MIPS_INT_MASK_5|MIPS_INT_MASK_SPL4)
-extern int splhigh __P((void));
-extern int splclock __P((void));
-extern int splstatclock __P((void));
-extern int splimp __P((void));
-extern int spltty __P((void));
-extern int splnet __P((void));
-extern int splbio __P((void));
-extern int splsoftnet __P((void));
-extern int spllowersoftclock __P((void));
-#define splsoftclock() spllowersoftclock() /* XXX XXX XXX */
-extern int spl0 __P((void));
-extern void splx __P((int));
+#define spl0() (void)_spllower(0)
+#define splx(s) (void)_splset(s)
+#define splbio() _splraise(MIPS_INT_MASK_SPL0)
+#define splnet() _splraise(MIPS_INT_MASK_SPL1)
+#define spltty() _splraise(MIPS_INT_MASK_SPL1)
+#define splimp() _splraise(MIPS_INT_MASK_SPL1)
+#define splclock() _splraise(MIPS_INT_MASK_SPL2)
+#define splstatclock() _splraise(MIPS_INT_MASK_SPL2)
+#define splhigh() _splraise(MIPS_INT_MASK_SPL2)
+#define splsoftclock() _splraise(MIPS_INT_MASK_SPL_SOFT0)
+#define splsoftnet() _splraise(MIPS_INT_MASK_SPL_SOFT1)
+#define spllowersoftclock() _spllower(MIPS_INT_MASK_SPL_SOFT0)
/*
* Index into intrcnt[], which is defined in locore
@@ -93,5 +110,10 @@
extern int (*mips_hardware_intr) __P((u_int, u_int, u_int, u_int));
extern int news3400_intr __P((u_int, u_int, u_int, u_int));
+/* handle software interrupts */
+extern void (*mips_software_intr) __P((int));
+extern void news3400_softintr __P((int));
+
#endif /* !_LOCORE */
+#endif /* _KERNEL */
#endif /* _MACHINE_INTR_H_ */
diff -r 6d99135e28a0 -r 85147a47ef23 sys/arch/newsmips/newsmips/autoconf.c
--- a/sys/arch/newsmips/newsmips/autoconf.c Sun Oct 17 10:18:15 1999 +0000
+++ b/sys/arch/newsmips/newsmips/autoconf.c Sun Oct 17 15:06:45 1999 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: autoconf.c,v 1.8 1999/09/17 20:04:43 thorpej Exp $ */
+/* $NetBSD: autoconf.c,v 1.9 1999/10/17 15:06:46 tsubai Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -90,7 +90,6 @@
void
cpu_configure()
{
- int s;
extern struct idrom idrom;
printf("SONY NET WORK STATION, Model %s, ", idrom.id_model);
@@ -99,7 +98,8 @@
/*
* Kick off autoconfiguration
*/
- s = splhigh();
+ spl0(); /* enable all interrupts */
+ splhigh(); /* ...then disable INT[012] */
*(char *)INTEN0 = INTEN0_BERR; /* only buserr occurs */
*(char *)INTEN1 = 0;
diff -r 6d99135e28a0 -r 85147a47ef23 sys/arch/newsmips/newsmips/newsmips_trap.c
--- a/sys/arch/newsmips/newsmips/newsmips_trap.c Sun Oct 17 10:18:15 1999 +0000
+++ b/sys/arch/newsmips/newsmips/newsmips_trap.c Sun Oct 17 15:06:45 1999 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: newsmips_trap.c,v 1.5 1998/06/25 21:19:16 thorpej Exp $ */
+/* $NetBSD: newsmips_trap.c,v 1.6 1999/10/17 15:06:46 tsubai Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -77,13 +77,12 @@
void print_int_stat __P((char *));
void exec_hb_intr2 __P((void));
void exec_hb_intr4 __P((void));
+void news3400_errintr __P((u_int));
extern int leintr __P((int));
extern int sc_intr __P((void));
extern void kbm_rint __P((int));
-extern u_int intrcnt[];
-
static int badaddr_flag;
/*
@@ -131,10 +130,9 @@
splx(MIPS_SR_INT_ENA_CUR | (statusReg & MIPS_INT_MASK_2));
if (mask & MIPS_INT_MASK_5) { /* level 5 interrupt */
- printf("level 5 interrupt: PC %x CR %x SR %x\n",
- pc, causeReg, statusReg);
- /* causeReg &= ~MIPS_INT_MASK_5; */
- /* panic("level 5 interrupt"); */
+ *(char *)INTCLR0 = INTCLR0_PERR;
+ news3400_errintr(pc);
+ causeReg &= ~MIPS_INT_MASK_5;
}
if (mask & MIPS_INT_MASK_4) { /* level 4 interrupt */
/*
@@ -157,13 +155,12 @@
MIPS_SR_INT_ENA_CUR);
}
-#ifdef notyet
-static void
-news3400_errintr()
+void
+news3400_errintr(pc)
+ u_int pc;
{
- panic("Memory error interrupt");
+ printf("Memory error interrupt(?) at 0x%x\n", pc);
}
-#endif
#include <newsmips/dev/dmac_0448.h>
@@ -360,3 +357,27 @@
{
printf("stray hb interrupt level 4\n");
}
+
+int
+news3400_badaddr(addr, size)
+ void *addr;
+ u_int size;
+{
+ volatile int x;
+
+ badaddr_flag = 0;
+
+ switch (size) {
+ case 1:
+ x = *(volatile int8_t *)addr;
+ break;
+ case 2:
+ x = *(volatile int16_t *)addr;
+ break;
+ case 4:
+ x = *(volatile int32_t *)addr;
+ break;
+ }
+
+ return badaddr_flag;
+}
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