[src/trunk]: src/sys/arch/i386/pci Fix a problem uncovered by rev 1.5 of pcib...

[nathanw <nathanw%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/76f54169f240
branches:  trunk
changeset: 495730:76f54169f240
user:      nathanw <nathanw%NetBSD.org@localhost>
date:      Thu Aug 03 20:10:45 2000 +0000

description:
Fix a problem uncovered by rev 1.5 of pcibios.c:

Avoid interpreting the upper 32 bits of 64-bit BARs as a 32-bit BAR.
Otherwise, the code would assume that the value 0 was incorrect and either:
(a) [on bus 0] "fix up" the address to some nonzero value, thus placing
    the decoded address range outside of 32-bit address space, or
(b) [elsewhere] completely disable the device.

The fact that this behaviour depends on the bus number of the device is
already XXX'd.

XXX: This will need revisiting if and when we ever want to handle a PCI bus
XXX: with more than 32 bits of address space on an i386.

The onboard Adaptec 7890 on my Dell Precision Workstation 410 works again.

diffstat:

 sys/arch/i386/pci/pci_addr_fixup.c |  20 +++++++++++++++++---
 1 files changed, 17 insertions(+), 3 deletions(-)

diffs (49 lines):

diff -r 1946f7c34fc8 -r 76f54169f240 sys/arch/i386/pci/pci_addr_fixup.c
--- a/sys/arch/i386/pci/pci_addr_fixup.c        Thu Aug 03 20:05:48 2000 +0000
+++ b/sys/arch/i386/pci/pci_addr_fixup.c        Thu Aug 03 20:10:45 2000 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pci_addr_fixup.c,v 1.6 2000/08/02 02:54:41 soda Exp $  */
+/*     $NetBSD: pci_addr_fixup.c,v 1.7 2000/08/03 20:10:45 nathanw Exp $       */
 
 /*-
  * Copyright (c) 2000 UCHIYAMA Yasushi.  All rights reserved.
@@ -189,7 +189,7 @@
        pcireg_t val, mask;
        bus_addr_t addr;
        bus_size_t size;
-       int error, useport, usemem, mapreg, type, reg_start, reg_end;
+       int error, useport, usemem, mapreg, type, reg_start, reg_end, width;
 
        val = pci_conf_read(pc, tag, PCI_BHLC_REG);
        switch (PCI_HDRTYPE_TYPE(val)) {
@@ -212,7 +212,7 @@
        }
        error = useport = usemem = 0;
     
-       for (mapreg = reg_start; mapreg < reg_end; mapreg += 4) {
+       for (mapreg = reg_start; mapreg < reg_end; mapreg += width) {
                /* inquire PCI device bus space requirement */
                val = pci_conf_read(pc, tag, mapreg);
                pci_conf_write(pc, tag, mapreg, ~0);
@@ -221,7 +221,21 @@
                pci_conf_write(pc, tag, mapreg, val);
        
                type = PCI_MAPREG_TYPE(val);
+               width = 4;
                if (type == PCI_MAPREG_TYPE_MEM) {
+                       if (PCI_MAPREG_MEM_TYPE(val) == 
+                           PCI_MAPREG_MEM_TYPE_64BIT) {
+                               /* XXX We could examine the upper 32 bits
+                                * XXX of the BAR here, but we are totally 
+                                * XXX unprepared to handle a non-zero value, 
+                                * XXX either here or anywhere else in 
+                                * XXX i386-land. 
+                                * XXX So just arrange to not look at the
+                                * XXX upper 32 bits, lest we misinterpret
+                                * XXX it as a 32-bit BAR set to zero. 
+                                */
+                           width = 8;
+                       }
                        size = PCI_MAPREG_MEM_SIZE(mask);
                        ex = pciaddr.extent_mem;
                } else {