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[src/trunk]: src/sys/arch/hpcmips/vr swap value of VR4181_SIU_ADDR and VR4181...



details:   https://anonhg.NetBSD.org/src/rev/cd19b17cd237
branches:  trunk
changeset: 515636:cd19b17cd237
user:      sato <sato%NetBSD.org@localhost>
date:      Sun Sep 30 11:33:00 2001 +0000

description:
swap value of VR4181_SIU_ADDR and VR4181_SIU1_ADDR.
fix typo.

diffstat:

 sys/arch/hpcmips/vr/vripreg.h |  8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diffs (36 lines):

diff -r 05370315182e -r cd19b17cd237 sys/arch/hpcmips/vr/vripreg.h
--- a/sys/arch/hpcmips/vr/vripreg.h     Sun Sep 30 11:24:07 2001 +0000
+++ b/sys/arch/hpcmips/vr/vripreg.h     Sun Sep 30 11:33:00 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: vripreg.h,v 1.5 2001/09/28 10:18:33 sato Exp $ */
+/*     $NetBSD: vripreg.h,v 1.6 2001/09/30 11:33:00 sato Exp $ */
 
 /*-
  * Copyright (c) 1999
@@ -53,7 +53,7 @@
 #define VR4181_KIU_ADDR                0x0a000180
 #define VR4181_DSIU_ADDR       0x0a0001a0
 #define VR4181_LED_ADDR                0x0a000240
-#define VR4181_SIU_ADDR                0x0c000000
+#define VR4181_SIU_ADDR                0x0c000010
 #define VR4181_HSP_ADDR                0x0a000020
 #define VR4181_FIR_ADDR                0x0a000000      /* XXX */
 #define VR4181_MEMCON_ADDR     0x0a000300
@@ -63,7 +63,7 @@
 #define VR4181_CSI81_ADDR      0x0b000900
 #define VR4181_GIU81_ADDR      0x0b000300
 #define VR4181_LCD_ADDR                0x0a000400
-#define VR4181_SIU1_ADDR       0x0c000010
+#define VR4181_SIU1_ADDR       0x0c000000
 #define        VR4181_SCU_ARR          VRIP_NO_ADDR    /* XXX: no register */
 #define VR4181_SDRAMU_ADDR     VRIP_NO_ADDR    /* XXX: no register */
 #define VR4181_PCI_ADDR                VRIP_NO_ADDR    /* XXX: no register */
@@ -246,7 +246,7 @@
 #define VRIP_ECU_ADDR          VR4102_ECU_ADDR         /* XXX: no register */
 #define VRIP_DCU81_ADDR                VR4102_DCU81_ADDR       /* XXX: no register */
 #define VRIP_CSI81_ADDR                VR4102_CSI81_ADDR       /* XXX: no register */
-#define VRIP_GIU81_ADDR                VR4102_CSI81_ADDR       /* XXX: no register */
+#define VRIP_GIU81_ADDR                VR4102_GIU81_ADDR       /* XXX: no register */
 #define VRIP_SIU1_ADDR         VR4102_SIU1_ADDR        /* XXX: no register */  
 #define        VRIP_SCU_ARR            VR4102_SCU_ARR          /* XXX: no register */
 #define VRIP_SDRAMU_ADDR       VR4102_SDRAMU_ADDR      /* XXX: no register */



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