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[src/thorpej_scsipi]: src/sys Update thorpej_scsipi to -current as of a month...



details:   https://anonhg.NetBSD.org/src/rev/b2e959d4d0db
branches:  thorpej_scsipi
changeset: 477334:b2e959d4d0db
user:      bouyer <bouyer%NetBSD.org@localhost>
date:      Mon Nov 20 22:35:40 2000 +0000

description:
Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.

diffstat:

 sys/arch/alpha/include/atomic.h           |   174 +
 sys/arch/alpha/include/bwx.h              |   117 +
 sys/arch/alpha/include/cpuvar.h           |    46 +
 sys/arch/alpha/include/endian_machdep.h   |     3 +
 sys/arch/alpha/include/int_types.h        |    61 +
 sys/arch/alpha/include/math.h             |    11 +
 sys/arch/alpha/include/pio.h              |    69 +
 sys/arch/alpha/include/rnd.h              |    67 +
 sys/arch/macppc/pci/grackle.c             |   184 +
 sys/arch/macppc/pci/uninorth.c            |   243 +
 sys/arch/newsmips/stand/boot/bootinfo.c   |    83 +
 sys/arch/newsmips/stand/boot/net.c        |   168 +
 sys/arch/newsmips/stand/boot/netif_news.c |   241 +
 sys/arch/newsmips/stand/boot/promdev.h    |    12 +
 sys/arch/newsmips/stand/common/Makefile   |    37 +
 sys/arch/newsmips/stand/common/romcalls.S |   138 +
 sys/arch/pmax/ibus/ibus_3max.c            |    80 +
 sys/arch/pmax/ibus/ibus_pmax.c            |   144 +
 sys/arch/prep/include/pc/display.h        |    47 +
 sys/arch/prep/isa/isa_machdep.c           |   231 +
 sys/arch/prep/isa/isabeep.c               |    85 +
 sys/arch/prep/isa/isadma_machdep.c        |   661 ++++
 sys/arch/prep/isa/joy.c                   |   234 +
 sys/arch/prep/isa/joy_isa.c               |   107 +
 sys/arch/prep/isa/joyvar.h                |    56 +
 sys/arch/prep/isa/kbdreg.h                |    28 +
 sys/arch/prep/isa/mcclock_isa.c           |   138 +
 sys/arch/prep/isa/pccons.c                |  2425 ++++++++++++++++
 sys/arch/sparc/sparc/auxiotwo.c           |   196 +
 sys/arch/sparc/sparc/auxiotwo.h           |    71 +
 sys/arch/sparc/sparc/disksubr.c.orig      |   464 +++
 sys/arch/sparc/sparc/disksubr.c.rej       |    65 +
 sys/dev/pci/bktr/README                   |    28 +
 sys/dev/pci/bktr/TODO                     |    16 +
 sys/dev/pci/bktr/bktr2netbsd              |   133 +
 sys/dev/pci/bktr/bktr_audio.c             |   579 ++++
 sys/dev/pci/bktr/bktr_audio.h             |    86 +
 sys/dev/pci/bktr/bktr_card.c              |  1221 ++++++++
 sys/dev/pci/bktr/bktr_card.h              |    89 +
 sys/dev/pci/bktr/bktr_core.c              |  4197 +++++++++++++++++++++++++++++
 sys/dev/pci/bktr/bktr_core.h              |    98 +
 sys/dev/pci/bktr/bktr_os.c                |  1721 +++++++++++
 sys/dev/pci/bktr/bktr_os.h                |    74 +
 sys/dev/pci/bktr/bktr_reg.h               |   723 ++++
 sys/dev/pci/bktr/bktr_tuner.c             |  1015 +++++++
 sys/dev/pci/bktr/bktr_tuner.h             |   105 +
 sys/dev/rcons/README                      |     3 +
 sys/dev/sbus/bwtwo_sbus.c                 |   243 +
 sys/dev/sbus/cgsix_sbus.c                 |   203 +
 sys/dev/sbus/cgthree_sbus.c               |   211 +
 sys/dev/sbus/p9100.c                      |   525 +++
 sys/dev/sbus/tcx.c                        |   487 +++
 sys/dev/sbus/tcxreg.h                     |   150 +
 sys/netccitt/x25isr.h                     |    44 +
 54 files changed, 18637 insertions(+), 0 deletions(-)

diffs (truncated from 18853 to 300 lines):

diff -r 88588b98b1ee -r b2e959d4d0db sys/arch/alpha/include/atomic.h
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/alpha/include/atomic.h   Mon Nov 20 22:35:40 2000 +0000
@@ -0,0 +1,174 @@
+/* $NetBSD: atomic.h,v 1.5.4.2 2000/11/20 22:35:40 bouyer Exp $ */
+
+/*-
+ * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
+ * NASA Ames Research Center.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *     This product includes software developed by the NetBSD
+ *     Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Misc. `atomic' operations.
+ */
+
+#ifndef _ALPHA_ATOMIC_H_
+#define        _ALPHA_ATOMIC_H_
+
+/*
+ * atomic_setbits_ulong:
+ *
+ *     Atomically set bits in a `unsigned long'.
+ */
+static __inline void
+atomic_setbits_ulong(__volatile unsigned long *ulp, unsigned long v)
+{
+       unsigned long t0;
+
+       __asm __volatile(
+               "# BEGIN atomic_setbits_ulong\n"
+               "1:     ldq_l   %0, %3          \n"
+               "       or      %0, %2, %0      \n"
+               "       stq_c   %0, %1          \n"
+               "       beq     %0, 2f          \n"
+               "       mb                      \n"
+               "       br      3f              \n"
+               "2:     br      1b              \n"
+               "3:                             \n"
+               "       # END atomic_setbits_ulong"
+               : "=r" (t0), "=m" (*ulp)
+               : "r" (v), "1" (*ulp));
+}
+
+/*
+ * atomic_clearbits_ulong:
+ *
+ *     Atomically clear bits in a `unsigned long'.
+ */
+static __inline void
+atomic_clearbits_ulong(__volatile unsigned long *ulp, unsigned long v)
+{
+       unsigned long t0;
+
+       __asm __volatile(
+               "# BEGIN atomic_clearbits_ulong\n"
+               "1:     ldq_l   %0, %3          \n"
+               "       and     %0, %2, %0      \n"
+               "       stq_c   %0, %1          \n"
+               "       beq     %0, 2f          \n"
+               "       mb                      \n"
+               "       br      3f              \n"
+               "2:     br      1b              \n"
+               "3:                             \n"
+               "       # END atomic_clearbits_ulong"
+               : "=r" (t0), "=m" (*ulp)
+               : "r" (~v), "1" (*ulp));
+}
+
+/*
+ * atomic_add_ulong:
+ *
+ *     Atomically add a value to a `unsigned long'.
+ */
+static __inline void
+atomic_add_ulong(__volatile unsigned long *ulp, unsigned long v)
+{
+       unsigned long t0;
+
+       __asm __volatile(
+               "# BEGIN atomic_add_ulong\n"
+               "1:     ldq_l   %0, %3          \n"
+               "       addq    %0, %2, %0      \n"
+               "       stq_c   %0, %1          \n"
+               "       beq     %0, 2f          \n"
+               "       mb                      \n"
+               "       br      3f              \n"
+               "2:     br      1b              \n"
+               "3:                             \n"
+               "       # END atomic_add_ulong"
+               : "=r" (t0), "=m" (*ulp)
+               : "r" (v), "1" (*ulp));
+}
+
+/*
+ * atomic_sub_ulong:
+ *
+ *     Atomically subtract a value from a `unsigned long'.
+ */
+static __inline void
+atomic_sub_ulong(__volatile unsigned long *ulp, unsigned long v)
+{
+       unsigned long t0;
+
+       __asm __volatile(
+               "# BEGIN atomic_sub_ulong\n"
+               "1:     ldq_l   %0, %3          \n"
+               "       subq    %0, %2, %0      \n"
+               "       stq_c   %0, %1          \n"
+               "       beq     %0, 2f          \n"
+               "       mb                      \n"
+               "       br      3f              \n"
+               "2:     br      1b              \n"
+               "3:                             \n"
+               "       # END atomic_sub_ulong"
+               : "=r" (t0), "=m" (*ulp)
+               : "r" (v), "1" (*ulp));
+}
+
+/*
+ * atomic_loadlatch_ulong:
+ *
+ *     Atomically load and latch a `unsigned long' value.
+ */
+static __inline unsigned long
+atomic_loadlatch_ulong(__volatile unsigned long *ulp, unsigned long v)
+{
+       unsigned long t0, v0;
+
+       __asm __volatile(
+               "# BEGIN atomic_loadlatch_ulong\n"
+               "1:     mov     %3, %0          \n"
+               "       ldq_l   %1, %4          \n"
+               "       stq_c   %0, %2          \n"
+               "       beq     %0, 2f          \n"
+               "       mb                      \n"
+               "       br      3f              \n"
+               "2:     br      1b              \n"
+               "3:                             \n"
+               "       # END atomic_loadlatch_ulong"
+               : "=r" (t0), "=r" (v0), "=m" (*ulp)
+               : "r" (v), "2" (*ulp));
+
+       return (v0);
+}
+
+#endif /* _ALPHA_ATOMIC_H_ */
diff -r 88588b98b1ee -r b2e959d4d0db sys/arch/alpha/include/bwx.h
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/alpha/include/bwx.h      Mon Nov 20 22:35:40 2000 +0000
@@ -0,0 +1,117 @@
+/* $NetBSD: bwx.h,v 1.3.4.2 2000/11/20 22:35:40 bouyer Exp $ */
+
+/*-
+ * Copyright (c) 1999 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
+ * NASA Ames Research Center.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *     This product includes software developed by the NetBSD
+ *     Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _ALPHA_BWX_H_
+#define        _ALPHA_BWX_H_
+
+/*
+ * Alpha Byte/Word Extension instructions.
+ *
+ * These instructions are available on EV56 (21164A) and later processors.
+ *
+ * See "Alpha Architecture Handbook, Version 3", DEC order number EC-QD2KB-TE.
+ */
+
+static __inline u_int8_t
+alpha_ldbu(__volatile u_int8_t *a0)
+{
+       u_int8_t v0;
+
+       __asm __volatile("ldbu %0, %1"
+               : "=r" (v0)
+               : "m" (*a0));
+
+       return (v0);
+}
+
+static __inline u_int16_t
+alpha_ldwu(__volatile u_int16_t *a0)
+{
+       u_int16_t v0;
+
+       __asm __volatile("ldwu %0, %1"
+               : "=r" (v0)
+               : "m" (*a0));
+
+       return (v0);
+}
+
+static __inline void
+alpha_stb(__volatile u_int8_t *a0, u_int8_t a1)
+{
+
+       __asm __volatile("stb %1, %0"
+               : "=m" (*a0)
+               : "r" (a1));
+}
+
+static __inline void
+alpha_stw(__volatile u_int16_t *a0, u_int16_t a1)
+{
+
+       __asm __volatile("stw %1, %0"
+               : "=m" (*a0)
+               : "r" (a1));
+}
+
+static __inline u_int8_t
+alpha_sextb(u_int8_t a0)
+{
+       u_int8_t v0;
+
+       __asm __volatile("sextb %1, %0"
+               : "=r" (v0)
+               : "r" (a0));
+
+       return (v0);
+}
+
+static __inline u_int16_t
+alpha_sextw(u_int16_t a0)
+{
+       u_int16_t v0;
+
+       __asm __volatile("sextw %1, %0"
+               : "=r" (v0)
+               : "r" (a0));
+
+       return (v0);
+}
+
+#endif /* _ALPHA_BWX_H_ */
diff -r 88588b98b1ee -r b2e959d4d0db sys/arch/alpha/include/cpuvar.h



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