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[src/nathanw_sa]: src/sys/arch/hpcmips/vr $NetBSD$ tag cleanup
details: https://anonhg.NetBSD.org/src/rev/a9163e7bbf8c
branches: nathanw_sa
changeset: 504622:a9163e7bbf8c
user: itojun <itojun%NetBSD.org@localhost>
date: Fri Apr 13 08:11:45 2001 +0000
description:
$NetBSD$ tag cleanup
diffstat:
sys/arch/hpcmips/vr/vrc4172icureg.h | 41 ++++++++++++++++++++++++++++++
sys/arch/hpcmips/vr/vrc4172pmureg.h | 50 +++++++++++++++++++++++++++++++++++++
sys/arch/hpcmips/vr/vrc4172pwmreg.h | 45 +++++++++++++++++++++++++++++++++
sys/arch/hpcmips/vr/vrc4172reg.h | 42 +++++++++++++++++++++++++++++++
4 files changed, 178 insertions(+), 0 deletions(-)
diffs (194 lines):
diff -r 1966b57a1f0b -r a9163e7bbf8c sys/arch/hpcmips/vr/vrc4172icureg.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/hpcmips/vr/vrc4172icureg.h Fri Apr 13 08:11:45 2001 +0000
@@ -0,0 +1,41 @@
+/* $NetBSD: vrc4172icureg.h,v 1.2.8.2 2001/04/13 08:11:45 itojun Exp $ */
+
+/*
+ * Copyright (c) 2000 SATO Kazumi. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * Vrc4172 ICU unit register definition
+ */
+#define VRC2_ICU_1284INTRQ 0x0
+#define VRC2_ICU_1284IRQ 0x08 /* interrupt to IRQ */
+#define VRC2_ICU_1284INTRP 0x04 /* interrupt to INTRP */
+#define VRC2_ICU_1284THRU 0x02 /* turu status */
+#define VRC2_ICU_1284LATCH 0x01 /* latched status and clear */
+
+#define VRC2_ICU_16550INTRQ 0x2
+#define VRC2_ICU_16550THRU 0x02 /* turu status */
+#define VRC2_ICU_16550LATCH 0x01 /* latched status and clear */
+
+/* end */
diff -r 1966b57a1f0b -r a9163e7bbf8c sys/arch/hpcmips/vr/vrc4172pmureg.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/hpcmips/vr/vrc4172pmureg.h Fri Apr 13 08:11:45 2001 +0000
@@ -0,0 +1,50 @@
+/* $NetBSD: vrc4172pmureg.h,v 1.2.8.2 2001/04/13 08:11:45 itojun Exp $ */
+
+/*
+ * Copyright (c) 2000 SATO Kazumi. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * Vrc4172 PMU unit register definition
+ */
+
+#define VRC2_PMU_SYSCLKCTRL 0x00
+#define VRC2_PMU_IRST 0x20 /* internal reset */
+#define VRC2_PMU_OSCDIS 0x10 /* OSC disable */
+#define VRC2_PMU_CKO48 0x01 /* CKO48 enable */
+#define VRC2_PMU_1284CTRL 0x02
+#define VRC2_PMU_1284EN 0x04 /* 1284 enable */
+#define VRC2_PMU_1284RST 0x02 /* 1284 reset (>= 1us) */
+#define VRC2_PMU_1284CLKDIS 0x01 /* 1284 clock disanle */
+#define VRC2_PMU_16550CTRL 0x04
+#define VRC2_PMU_16550RST 0x02 /* 16550 reset (>= 200ms) */
+#define VRC2_PMU_16550CLKDIS 0x01 /* 16550 clock disable */
+#define VRC2_PMU_USBCTL 0x0c
+#define VRC2_PMU_USBCLKDIS 0x01 /* USB clock disable */
+#define VRC2_PMU_PS2PWMCTL 0x0e
+#define VRC2_PMU_PWMCLKDIS 0x10 /* PWM clock disable */
+#define VRC2_PMU_PS2RST 0x02 /* PS2 reset */
+#define VRC2_PMU_PS2CLKDIS 0x01 /* PS2 clock disable */
+
+/* end */
diff -r 1966b57a1f0b -r a9163e7bbf8c sys/arch/hpcmips/vr/vrc4172pwmreg.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/hpcmips/vr/vrc4172pwmreg.h Fri Apr 13 08:11:45 2001 +0000
@@ -0,0 +1,45 @@
+/* $NetBSD: vrc4172pwmreg.h,v 1.4.8.2 2001/04/13 08:11:45 itojun Exp $ */
+
+/*
+ * Copyright (c) 2000 SATO Kazumi. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * Vrc4172 PWM unit register definition
+ */
+
+#define VRC2_PWM_LCDDUTYEN 0x00 /* LCDBAK control enable */
+#define VRC2_PWM_LCDEN_MASK 0x01
+#define VRC2_PWM_LCD_EN 0x01 /* enable */
+#define VRC2_PWM_LCD_DIS 0x00 /* disable */
+#define VRC2_PWM_LCDFREQ 0x02
+#define VRC2_PWM_LCDFREQ_MASK 0xff
+#define VRC2_PWM_LCDFREQ_DEF 0x2a /* default XXX */
+ /* f = 1(2^4/8000000 * 64 x (LCDFREQ+1) */
+#define VRC2_PWM_LCDDUTY 0x04
+#define VRC2_PWM_LCDDUTY_MASK 0x3f
+#define VRC2_PWM_LCDDUTY_DEF 0x25 /* default XXX */
+ /* T = 1/(64f) x (LCDDUTY+1) */
+
+/* end */
diff -r 1966b57a1f0b -r a9163e7bbf8c sys/arch/hpcmips/vr/vrc4172reg.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/hpcmips/vr/vrc4172reg.h Fri Apr 13 08:11:45 2001 +0000
@@ -0,0 +1,42 @@
+/* $NetBSD: vrc4172reg.h,v 1.3.8.2 2001/04/13 08:11:45 itojun Exp $ */
+
+/*
+ * Copyright (c) 2000 SATO Kazumi. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * Vrc4172 (Vr4121 companion chip) device units definitions
+ */
+
+#define VRC2_GPIOL_ADDR 0x15001080 /* GPIO (0..15) */
+#define VRC2_PCS_ADDR 0x15001090 /* PCS Programable chip selects */
+#define VRC2_GPIOH_ADDR 0x150010c0 /* GPIO (16..23) */
+#define VRC2_PMU_ADDR 0x15003800 /* PMU */
+#define VRC2_ICU_ADDR 0x15003808 /* ICU */
+#define VRC2_COM_ADDR 0x15003810 /* NS16550A compat */
+#define VRC2_PIO_ADDR 0x15003820 /* IEEE1284 parallel */
+#define VRC2_PS2_ADDR 0x15003870 /* PS/2 controler */
+#define VRC2_PWM_ADDR 0x15003880 /* PWM (backlight pulus) controller */
+
+/* end */
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