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[src/trunk]: src/sys/arch/hpcarm/dev initial commit UDA1341 CODEC
details: https://anonhg.NetBSD.org/src/rev/090d594263f6
branches: trunk
changeset: 512743:090d594263f6
user: ichiro <ichiro%NetBSD.org@localhost>
date: Sun Jul 15 20:19:31 2001 +0000
description:
initial commit UDA1341 CODEC
diffstat:
sys/arch/hpcarm/dev/ipaq_gpioreg.h | 4 +-
sys/arch/hpcarm/dev/uda1341.c | 468 +++++++++++++++++++++++++++++++++++++
sys/arch/hpcarm/dev/uda1341.h | 19 +-
3 files changed, 481 insertions(+), 10 deletions(-)
diffs (truncated from 527 to 300 lines):
diff -r f576b3eca3ee -r 090d594263f6 sys/arch/hpcarm/dev/ipaq_gpioreg.h
--- a/sys/arch/hpcarm/dev/ipaq_gpioreg.h Sun Jul 15 20:02:21 2001 +0000
+++ b/sys/arch/hpcarm/dev/ipaq_gpioreg.h Sun Jul 15 20:19:31 2001 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ipaq_gpioreg.h,v 1.4 2001/07/15 13:29:38 ichiro Exp $ */
+/* $NetBSD: ipaq_gpioreg.h,v 1.5 2001/07/15 20:19:31 ichiro Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved.
@@ -83,6 +83,8 @@
*/
#define GPIO_H3600_POWER_BUTTON GPIO (0)
+#define GPIO_H3600_CLK_SET0 GPIO (12)
+#define GPIO_H3600_CLK_SET1 GPIO (13)
#define GPIO_H3600_PCMCIA_CD0 GPIO (17)
#define GPIO_H3600_PCMCIA_CD1 GPIO (10)
#define GPIO_H3600_PCMCIA_IRQ0 GPIO (21)
diff -r f576b3eca3ee -r 090d594263f6 sys/arch/hpcarm/dev/uda1341.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/hpcarm/dev/uda1341.c Sun Jul 15 20:19:31 2001 +0000
@@ -0,0 +1,468 @@
+/* $NetBSD: uda1341.c,v 1.1 2001/07/15 20:19:31 ichiro Exp $ */
+
+/*-
+ * Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Ichiro FUKUHARA (ichiro%ichiro.org@localhost).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the NetBSD
+ * Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/types.h>
+#include <sys/conf.h>
+#include <sys/file.h>
+#include <sys/device.h>
+#include <sys/kernel.h>
+#include <sys/kthread.h>
+#include <sys/malloc.h>
+
+#include <machine/bus.h>
+
+#include <hpcarm/dev/ipaq_saipvar.h>
+#include <hpcarm/dev/ipaq_gpioreg.h>
+#include <hpcarm/dev/uda1341.h>
+#include <hpcarm/sa11x0/sa11x0_gpioreg.h>
+#include <hpcarm/sa11x0/sa11x0_sspreg.h>
+
+struct uda1341_softc {
+ struct device sc_dev;
+ bus_space_tag_t sc_iot;
+ bus_space_handle_t sc_ioh;
+ struct ipaq_softc *sc_parent;
+};
+
+static int uda1341_match(struct device *, struct cfdata *, void *);
+static void uda1341_attach(struct device *, struct device *, void *);
+static int uda1341_print(void *, const char *);
+static int uda1341_search(struct device *, struct cfdata *, void *);
+
+static void uda1341_output_high(struct uda1341_softc *);
+static void uda1341_output_low(struct uda1341_softc *);
+static void uda1341_L3_init(struct uda1341_softc *);
+static void uda1341_init(struct uda1341_softc *);
+static void uda1341_reset(struct uda1341_softc *);
+static void uda1341_reginit(struct uda1341_softc *);
+
+static int L3_getbit(struct uda1341_softc *);
+static void L3_sendbit(struct uda1341_softc *, int);
+static u_int8_t L3_getbyte(struct uda1341_softc *, int);
+static void L3_sendbyte(struct uda1341_softc *, u_int8_t, int);
+static int L3_read(struct uda1341_softc *, u_int8_t, u_int8_t *, int);
+static int L3_write(struct uda1341_softc *, u_int8_t, u_int8_t *, int);
+
+struct cfattach uda_ca = {
+ sizeof(struct uda1341_softc), uda1341_match, uda1341_attach
+};
+
+/*
+ * Philips L3 bus support.
+ * GPIO lines are used for clock, data and mode pins.
+ */
+#define L3_DATA GPIO_H3600_L3_DATA
+#define L3_MODE GPIO_H3600_L3_MODE
+#define L3_CLK GPIO_H3600_L3_CLK
+
+static struct {
+ u_int8_t data0; /* direct addressing register */
+} DIRECT_REG = {0};
+
+static struct {
+ u_int8_t data0; /* extended addressing register 1 */
+ u_int8_t data1; /* extended addressing register 2 */
+} EXTEND_REG = {0, 0};
+
+/*
+ * register space access macros
+ */
+#define GPIO_WRITE(sc, reg, val) \
+ bus_space_write_4(sc->sc_iot, sc->sc_parent->sc_gpioh, reg, val)
+#define GPIO_READ(sc, reg) \
+ bus_space_read_4(sc->sc_iot, sc->sc_parent->sc_gpioh, reg)
+#define EGPIO_WRITE(sc) \
+ bus_space_write_2(sc->sc_iot, sc->sc_parent->sc_egpioh, \
+ 0, sc->sc_parent->ipaq_egpio)
+#define SSP_WRITE(sc, reg, val) \
+ bus_space_write_4(sc->sc_iot, sc->sc_parent->sc_ssph, reg, val)
+
+static int
+uda1341_match(parent, cf, aux)
+ struct device *parent;
+ struct cfdata *cf;
+ void *aux;
+{
+ return (1);
+}
+
+static void
+uda1341_attach(parent, self, aux)
+ struct device *parent;
+ struct device *self;
+ void *aux;
+{
+ struct uda1341_softc *sc = (struct uda1341_softc *)self;
+ struct ipaq_softc *psc = (struct ipaq_softc *)parent;
+
+ printf("\n");
+ printf("%s: UDA1341 CODEC\n", sc->sc_dev.dv_xname);
+
+ sc->sc_iot = psc->sc_iot;
+ sc->sc_ioh = psc->sc_ioh;
+ sc->sc_parent = (struct ipaq_softc *)parent;
+
+ uda1341_L3_init(sc);
+ uda1341_init(sc);
+
+ uda1341_reset(sc);
+
+ uda1341_reginit(sc);
+
+
+ /*
+ * Attach each devices
+ */
+
+ config_search(uda1341_search, self, NULL);
+}
+
+static int
+uda1341_search(parent, cf, aux)
+ struct device *parent;
+ struct cfdata *cf;
+ void *aux;
+{
+ if ((*cf->cf_attach->ca_match)(parent, cf, NULL) > 0)
+ config_attach(parent, cf, NULL, uda1341_print);
+ return 0;
+}
+
+
+static int
+uda1341_print(aux, name)
+ void *aux;
+ const char *name;
+{
+ return (UNCONF);
+}
+
+static void
+uda1341_output_high(sc)
+ struct uda1341_softc *sc;
+{
+ int cr;
+
+ GPIO_WRITE(sc, SAGPIO_PSR, (L3_DATA | L3_MODE | L3_CLK));
+ cr = GPIO_READ(sc, SAGPIO_PDR) | (L3_DATA | L3_MODE | L3_CLK);
+ GPIO_WRITE(sc, SAGPIO_PDR, cr);
+}
+
+static void
+uda1341_output_low(sc)
+ struct uda1341_softc *sc;
+{
+ int cr;
+
+ cr = GPIO_READ(sc, SAGPIO_PDR);
+ cr &= ~(L3_DATA | L3_MODE | L3_CLK);
+ GPIO_WRITE(sc, SAGPIO_PDR, cr);
+}
+
+static void
+uda1341_L3_init(sc)
+ struct uda1341_softc *sc;
+{
+ int cr;
+
+ cr = GPIO_READ(sc, SAGPIO_AFR);
+ cr &= ~(L3_DATA | L3_MODE | L3_CLK);
+ GPIO_WRITE(sc, SAGPIO_AFR, cr);
+
+ uda1341_output_low(sc);
+}
+
+static void
+uda1341_init(sc)
+ struct uda1341_softc *sc;
+{
+ int cr;
+
+ /* GPIO initialize */
+ cr = GPIO_READ(sc, SAGPIO_AFR);
+ cr &= ~(GPIO_ALT_SSP_TXD | GPIO_ALT_SSP_RXD | GPIO_ALT_SSP_SCLK |
+ GPIO_ALT_SSP_SFRM);
+ cr |= GPIO_ALT_SSP_CLK;
+ GPIO_WRITE(sc, SAGPIO_AFR, cr);
+
+ cr = GPIO_READ(sc, SAGPIO_PDR);
+ cr &= ~GPIO_ALT_SSP_CLK;
+ GPIO_WRITE(sc, SAGPIO_PDR, cr);
+
+ /* SSP initialize & enable */
+ SSP_WRITE(sc, SASSP_CR1, CR1_ECS);
+ cr = 0xF | (CR0_FRF_MASK & (1<<4)) | (CR0_SCR_MASK & (3<<8)) | CR0_SSE;
+ SSP_WRITE(sc, SASSP_CR0, cr);
+
+ /* Enable the audio power */
+ sc->sc_parent->ipaq_egpio |=
+ (EGPIO_H3600_AUD_PWRON | EGPIO_H3600_AUD_ON);
+ sc->sc_parent->ipaq_egpio &=
+ ~(EGPIO_H3600_CODEC_RESET | EGPIO_H3600_QMUTE);
+ EGPIO_WRITE(sc);
+
+ /* external clock configured for 44100 samples/sec */
+ cr = GPIO_READ(sc, SAGPIO_PDR);
+ cr |= (GPIO_H3600_CLK_SET0 | GPIO_H3600_CLK_SET1);
+ GPIO_WRITE(sc, SAGPIO_PDR, cr);
+ GPIO_WRITE(sc, SAGPIO_PSR, GPIO_H3600_CLK_SET0);
+ GPIO_WRITE(sc, SAGPIO_PCR, GPIO_H3600_CLK_SET1);
+
+ /* wait for power on */
+ delay(100*1000);
+ sc->sc_parent->ipaq_egpio |= EGPIO_H3600_CODEC_RESET;
+ EGPIO_WRITE(sc);
+
+ /* Wait for the UDA1341 to wake up */
+ delay(100*1000);
+}
+
+static void
+uda1341_reset(sc)
+ struct uda1341_softc *sc;
+{
+ u_int8_t command;
+
+ command = (L3_ADDRESS_COM << 2) | L3_ADDRESS_STATUS;
+ DIRECT_REG.data0 = STATUS0_RST | STATUS0_SC_256 | STATUS0_IF_LSB16;
+ L3_write(sc, command, (u_int8_t *) &DIRECT_REG, 1);
+
+ sc->sc_parent->ipaq_egpio &= ~EGPIO_H3600_CODEC_RESET;
+ EGPIO_WRITE(sc);
+ sc->sc_parent->ipaq_egpio |= EGPIO_H3600_CODEC_RESET;
+ EGPIO_WRITE(sc);
+
+ DIRECT_REG.data0 &= ~STATUS0_RST;
+ L3_write(sc, command, (u_int8_t *) &DIRECT_REG, 1);
+}
+
+static void
+uda1341_reginit(sc)
+ struct uda1341_softc *sc;
+{
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