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[src/nathanw_sa]: src/sys/arch Remove the use of splimp() from the NetBSD ker...
details: https://anonhg.NetBSD.org/src/rev/a8613ab06ef2
branches: nathanw_sa
changeset: 504623:a8613ab06ef2
user: thorpej <thorpej%NetBSD.org@localhost>
date: Fri Apr 13 23:30:00 2001 +0000
description:
Remove the use of splimp() from the NetBSD kernel. splnet()
and only splnet() is allowed for the protection of data structures
used by network devices.
diffstat:
sys/arch/atari/include/intr.h | 84 ++++++++++++++++++++++++
sys/arch/mac68k/include/intr.h | 118 ++++++++++++++++++++++++++++++++++
sys/arch/newsmips/include/intr.h | 135 +++++++++++++++++++++++++++++++++++++++
sys/arch/x68k/include/intr.h | 84 ++++++++++++++++++++++++
4 files changed, 421 insertions(+), 0 deletions(-)
diffs (truncated from 437 to 300 lines):
diff -r a9163e7bbf8c -r a8613ab06ef2 sys/arch/atari/include/intr.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/atari/include/intr.h Fri Apr 13 23:30:00 2001 +0000
@@ -0,0 +1,84 @@
+/* $NetBSD: intr.h,v 1.11.8.2 2001/04/13 23:30:00 thorpej Exp $ */
+
+/*-
+ * Copyright (c) 1997 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the NetBSD
+ * Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _ATARI_INTR_H_
+#define _ATARI_INTR_H_
+
+#define IPL_NONE 0 /* disable no interrupts */
+#define IPL_BIO (PSL_S|PSL_IPL3) /* disable block I/O interrupts */
+#define IPL_NET (PSL_S|PSL_IPL3) /* disable network interrupts */
+#define IPL_TTY (PSL_S|PSL_IPL4) /* disable terminal interrupts */
+#define IPL_CLOCK (PSL_S|PSL_IPL6) /* disable clock interrupts */
+#define IPL_HIGH (PSL_S|PSL_IPL7) /* disable all interrupts */
+
+#define IST_UNUSABLE -1 /* interrupt cannot be used */
+#define IST_NONE 0 /* none (dummy) */
+#define IST_PULSE 1 /* pulsed */
+#define IST_EDGE 2 /* edge-triggered */
+#define IST_LEVEL 3 /* level-triggered */
+
+/*
+ * spl functions; all but spl0 are done in-line
+ */
+#include <machine/psl.h>
+
+/* spl0 requires checking for software interrupts */
+
+#define splnone() spl0()
+#define spllowersoftclock() spl1()
+
+#define splsoftclock() splraise1()
+#define splsoftnet() splraise1()
+
+#define splbio() _splraise(PSL_S|PSL_IPL3)
+#define splnet() _splraise(PSL_S|PSL_IPL3)
+#define spltty() _splraise(PSL_S|PSL_IPL4)
+#define splvm() _splraise(PSL_S|PSL_IPL4)
+
+#define spllpt() spltty()
+
+#define splclock() splraise6()
+#define splstatclock() splraise6()
+#define splhigh() spl7()
+#define splsched() spl7()
+#define spllock() spl7()
+
+#define splx(s) ((s) & PSL_IPL ? _spl(s) : spl0())
+
+#ifdef _KERNEL
+int spl0 __P((void));
+#endif /* _KERNEL */
+
+#endif /* _ATARI_INTR_H_ */
diff -r a9163e7bbf8c -r a8613ab06ef2 sys/arch/mac68k/include/intr.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/mac68k/include/intr.h Fri Apr 13 23:30:00 2001 +0000
@@ -0,0 +1,118 @@
+/* $NetBSD: intr.h,v 1.20.8.2 2001/04/13 23:30:01 thorpej Exp $ */
+
+/*
+ * Copyright (C) 1997 Scott Reynolds
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _MAC68K_INTR_H_
+#define _MAC68K_INTR_H_
+
+#include <machine/psl.h>
+
+#ifdef _KERNEL
+
+/* spl0 requires checking for software interrupts */
+
+/*
+ * This array contains the appropriate PSL_S|PSL_IPL? values
+ * to raise interrupt priority to the requested level.
+ */
+extern unsigned short mac68k_ipls[];
+
+#define MAC68K_IPL_SOFT 0
+#define MAC68K_IPL_BIO 1
+#define MAC68K_IPL_NET 2
+#define MAC68K_IPL_TTY 3
+#define MAC68K_IPL_IMP 4
+#define MAC68K_IPL_AUDIO 5
+#define MAC68K_IPL_SERIAL 6
+#define MAC68K_IPL_ADB 7
+#define MAC68K_IPL_CLOCK 8
+#define MAC68K_IPL_STATCLOCK 9
+#define MAC68K_IPL_SCHED 10
+#define MAC68K_IPL_HIGH 11
+#define MAC68K_NIPLS 12
+
+/* These spl calls are _not_ to be used by machine-independent code. */
+#define spladb() _splraise(mac68k_ipls[MAC68K_IPL_ADB])
+#define splzs() splserial()
+
+/*
+ * These should be used for:
+ * 1) ensuring mutual exclusion (why use processor level?)
+ * 2) allowing faster devices to take priority
+ */
+#define spllowersoftclock() spl1()
+#define splsoftclock() _splraise(mac68k_ipls[MAC68K_IPL_SOFT])
+#define splsoftnet() _splraise(mac68k_ipls[MAC68K_IPL_SOFT])
+#define spltty() _splraise(mac68k_ipls[MAC68K_IPL_TTY])
+#define splbio() _splraise(mac68k_ipls[MAC68K_IPL_BIO])
+#define splnet() _splraise(mac68k_ipls[MAC68K_IPL_NET])
+#define splvm() _splraise(mac68k_ipls[MAC68K_IPL_IMP])
+#define splaudio() _splraise(mac68k_ipls[MAC68K_IPL_AUDIO])
+#define splclock() _splraise(mac68k_ipls[MAC68K_IPL_CLOCK])
+#define splstatclock() _splraise(mac68k_ipls[MAC68K_IPL_STATCLOCK])
+#define splsched() _splraise(mac68k_ipls[MAC68K_IPL_SCHED])
+#define splserial() _splraise(mac68k_ipls[MAC68K_IPL_SERIAL])
+#define splhigh() spl7()
+#define spllock() spl7()
+
+/* watch out for side effects */
+#define splx(s) ((s) & PSL_IPL ? _spl(s) : spl0())
+
+/*
+ * simulated software interrupt register
+ */
+extern volatile u_int8_t ssir;
+
+#define SIR_NET 0x01
+#define SIR_CLOCK 0x02
+#define SIR_SERIAL 0x04
+#define SIR_DTMGR 0x08
+#define SIR_ADB 0x10
+
+#define siron(mask) \
+ __asm __volatile ( "orb %1,%0" : "=m" (ssir) : "i" (mask))
+#define siroff(mask) \
+ __asm __volatile ( "andb %1,%0" : "=m" (ssir) : "ir" (~(mask)));
+
+#define setsoftnet() siron(SIR_NET)
+#define setsoftclock() siron(SIR_CLOCK)
+#define setsoftserial() siron(SIR_SERIAL)
+#define setsoftdtmgr() siron(SIR_DTMGR)
+#define setsoftadb() siron(SIR_ADB)
+
+/* intr.c */
+void intr_init __P((void));
+void intr_establish __P((int (*)(void *), void *, int));
+void intr_disestablish __P((int));
+void intr_dispatch __P((int));
+
+/* locore.s */
+int spl0 __P((void));
+#endif /* _KERNEL */
+
+#endif /* _MAC68K_INTR_H_ */
diff -r a9163e7bbf8c -r a8613ab06ef2 sys/arch/newsmips/include/intr.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/newsmips/include/intr.h Fri Apr 13 23:30:00 2001 +0000
@@ -0,0 +1,135 @@
+/* $NetBSD: intr.h,v 1.11.8.2 2001/04/13 23:30:03 thorpej Exp $ */
+
+/*
+ * Copyright (c) 1998 Jonathan Stone. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Jonathan Stone for
+ * the NetBSD Project.
+ * 4. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _MACHINE_INTR_H_
+#define _MACHINE_INTR_H_
+
+#define IPL_NONE 0 /* disable only this interrupt */
+#define IPL_BIO 1 /* disable block I/O interrupts */
+#define IPL_NET 2 /* disable network interrupts */
+#define IPL_TTY 3 /* disable terminal interrupts */
+#define IPL_CLOCK 4 /* disable clock interrupts */
+#define IPL_STATCLOCK 5 /* disable profiling interrupts */
+#define IPL_SERIAL 6 /* disable serial hardware interrupts */
+#define IPL_HIGH 7 /* disable all interrupts */
+
+#ifdef _KERNEL
+#ifndef _LOCORE
+#include <mips/cpuregs.h>
+
+extern int _splraise __P((int));
+extern int _spllower __P((int));
+extern int _splset __P((int));
+extern int _splget __P((void));
+extern void _splnone __P((void));
+extern void _setsoftintr __P((int));
+extern void _clrsoftintr __P((int));
+
+/*
+ * software simulated interrupt
+ */
+#define SIR_NET 0x01
+#define SIR_SERIAL 0x02
+
+#define setsoft(x) do { \
+ extern u_int ssir; \
+ int s; \
+ \
+ s = splhigh(); \
+ ssir |= (x); \
+ _setsoftintr(MIPS_SOFT_INT_MASK_1); \
+ splx(s); \
+} while (0)
+
+#define setsoftclock() _setsoftintr(MIPS_SOFT_INT_MASK_0)
+#define setsoftnet() setsoft(SIR_NET)
+#define setsoftserial() setsoft(SIR_SERIAL)
+
+/*
+ * nesting interrupt masks.
+ */
+#define MIPS_INT_MASK_SPL_SOFT0 MIPS_SOFT_INT_MASK_0
+#define MIPS_INT_MASK_SPL_SOFT1 (MIPS_SOFT_INT_MASK_1|MIPS_INT_MASK_SPL_SOFT0)
+#define MIPS_INT_MASK_SPL0 (MIPS_INT_MASK_0|MIPS_INT_MASK_SPL_SOFT1)
+#define MIPS_INT_MASK_SPL1 (MIPS_INT_MASK_1|MIPS_INT_MASK_SPL0)
+#define MIPS_INT_MASK_SPL2 (MIPS_INT_MASK_2|MIPS_INT_MASK_SPL1)
+#define MIPS_INT_MASK_SPL3 (MIPS_INT_MASK_3|MIPS_INT_MASK_SPL2)
+#define MIPS_INT_MASK_SPL4 (MIPS_INT_MASK_4|MIPS_INT_MASK_SPL3)
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