Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/sys/arch/atari/atari Prepare assembly parts for an eventual ...
details: https://anonhg.NetBSD.org/src/rev/7563fa6c3ed1
branches: trunk
changeset: 503594:7563fa6c3ed1
user: leo <leo%NetBSD.org@localhost>
date: Fri Feb 09 21:47:45 2001 +0000
description:
Prepare assembly parts for an eventual transition to ELF. Mostly from a
diff from Steve Woodford.
diffstat:
sys/arch/atari/atari/atari_init.c | 14 +-
sys/arch/atari/atari/fpu.c | 4 +-
sys/arch/atari/atari/locore.s | 1269 ++++++++++++++++++------------------
sys/arch/atari/atari/machdep.c | 13 +-
sys/arch/atari/atari/vectors.s | 275 +++----
5 files changed, 770 insertions(+), 805 deletions(-)
diffs (truncated from 2440 to 300 lines):
diff -r 97fc2c4f20ad -r 7563fa6c3ed1 sys/arch/atari/atari/atari_init.c
--- a/sys/arch/atari/atari/atari_init.c Fri Feb 09 20:42:27 2001 +0000
+++ b/sys/arch/atari/atari/atari_init.c Fri Feb 09 21:47:45 2001 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: atari_init.c,v 1.52 2001/02/01 08:58:03 leo Exp $ */
+/* $NetBSD: atari_init.c,v 1.53 2001/02/09 21:47:45 leo Exp $ */
/*
* Copyright (c) 1995 Leo Weppelman
@@ -514,25 +514,25 @@
if (cputype == CPU_68060) {
/* XXX: Need the branch cache be cleared? */
asm volatile (".word 0x4e7a,0x0002;"
- "orl #0x400000,d0;"
+ "orl #0x400000,%%d0;"
".word 0x4e7b,0x0002" : : : "d0");
}
- asm volatile ("movel %0,a0;"
+ asm volatile ("movel %0,%%a0;"
".word 0x4e7b,0x8807" : : "a" (Sysseg_pa) : "a0");
asm volatile (".word 0xf518" : : );
- asm volatile ("movel #0xc000,d0;"
+ asm volatile ("movel #0xc000,%%d0;"
".word 0x4e7b,0x0003" : : : "d0" );
} else
#endif
{
- asm volatile ("pmove %0@,srp" : : "a" (&protorp[0]));
+ asm volatile ("pmove %0@,%%srp" : : "a" (&protorp[0]));
/*
* setup and load TC register.
* enable_cpr, enable_srp, pagesize=8k,
* A = 8 bits, B = 11 bits
*/
tc = 0x82d08b00;
- asm volatile ("pmove %0@,tc" : : "a" (&tc));
+ asm volatile ("pmove %0@,%%tc" : : "a" (&tc));
}
/* Is this to fool the optimizer?? */
@@ -995,7 +995,7 @@
extern trapfun illinst;
#endif
- asm volatile ("movl %0,d0; .word 0x4e7b,0x0808" : :
+ asm volatile ("movl %0,%%d0; .word 0x4e7b,0x0808" : :
"d"(m68060_pcr_init):"d0" );
/* bus/addrerr vectors */
diff -r 97fc2c4f20ad -r 7563fa6c3ed1 sys/arch/atari/atari/fpu.c
--- a/sys/arch/atari/atari/fpu.c Fri Feb 09 20:42:27 2001 +0000
+++ b/sys/arch/atari/atari/fpu.c Fri Feb 09 21:47:45 2001 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu.c,v 1.6 1997/04/24 22:37:11 gwr Exp $ */
+/* $NetBSD: fpu.c,v 1.7 2001/02/09 21:47:46 leo Exp $ */
/*-
* Copyright (c) 1996 The NetBSD Foundation, Inc.
@@ -116,7 +116,7 @@
* have if this will. We save the state in order to get the
* size of the frame.
*/
- asm("movl %0, a0; fsave a0@" : : "a" (&fpframe) : "a0" );
+ asm("movl %0, %%a0; fsave %%a0@" : : "a" (&fpframe) : "a0" );
b = fpframe.fpf_fsize;
diff -r 97fc2c4f20ad -r 7563fa6c3ed1 sys/arch/atari/atari/locore.s
--- a/sys/arch/atari/atari/locore.s Fri Feb 09 20:42:27 2001 +0000
+++ b/sys/arch/atari/atari/locore.s Fri Feb 09 21:47:45 2001 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.s,v 1.75 2000/11/26 11:47:24 jdolecek Exp $ */
+/* $NetBSD: locore.s,v 1.76 2001/02/09 21:47:46 leo Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -64,7 +64,7 @@
* of the kernel text segment (not necessarily the same as kernbase).
*/
.text
- .globl _kernel_text
+ GLOBAL(kernel_text)
_kernel_text:
/*
@@ -80,11 +80,9 @@
* Do a dump.
* Called by auto-restart.
*/
- .globl _dumpsys
- .globl _doadump
-_doadump:
- jbsr _dumpsys
- jbsr _doboot
+ENTRY_NOPROFILE(doadump)
+ jbsr _C_LABEL(dumpsys)
+ jbsr _C_LABEL(doboot)
/*NOTREACHED*/
/*
@@ -92,171 +90,166 @@
*/
#include <m68k/m68k/trap_subr.s>
- .globl _C_LABEL(trap), _C_LABEL(nofault), _C_LABEL(longjmp)
-
#if defined(M68040) || defined(M68060)
.globl _C_LABEL(addrerr4060)
-_C_LABEL(addrerr4060):
- clrl sp@- | stack adjust count
- moveml #0xFFFF,sp@- | save user registers
- movl usp,a0 | save the user SP
- movl a0,sp@(FR_SP) | in the savearea
- movl sp@(FR_HW+8),sp@-
- clrl sp@- | dummy code
- movl #T_ADDRERR,sp@- | mark address error
+ENTRY_NOPROFILE(addrerr4060)
+ clrl %sp@- | stack adjust count
+ moveml #0xFFFF,%sp@- | save user registers
+ movl %usp,%a0 | save the user SP
+ movl %a0,%sp@(FR_SP) | in the savearea
+ movl %sp@(FR_HW+8),%sp@-
+ clrl %sp@- | dummy code
+ movl #T_ADDRERR,%sp@- | mark address error
jra _ASM_LABEL(faultstkadj) | and deal with it
#endif /* defined(M68040) || defined(M68060) */
#if defined(M68060)
- .globl _C_LABEL(buserr60)
-_C_LABEL(buserr60):
- clrl sp@- | stack adjust count
- moveml #0xFFFF,sp@- | save user registers
- movl usp,a0 | save the user SP
- movl a0,sp@(FR_SP) | in the savearea
- movel sp@(FR_HW+12),d0 | FSLW
- btst #2,d0 | branch prediction error?
+ENTRY_NOPROFILE(buserr60)
+ clrl %sp@- | stack adjust count
+ moveml #0xFFFF,%sp@- | save user registers
+ movl %usp,%a0 | save the user SP
+ movl %a0,%sp@(FR_SP) | in the savearea
+ movel %sp@(FR_HW+12),%d0 | FSLW
+ btst #2,%d0 | branch prediction error?
jeq Lnobpe
- movc cacr,d2
- orl #IC60_CABC,d2 | clear all branch cache entries
- movc d2,cacr
- movl d0,d1
+ movc %cacr,%d2
+ orl #IC60_CABC,%d2 | clear all branch cache entries
+ movc %d2,%cacr
+ movl %d0,%d1
addql #1,L60bpe
- andl #0x7ffd,d1
+ andl #0x7ffd,%d1
jeq _ASM_LABEL(faultstkadjnotrap2)
Lnobpe:
| we need to adjust for misaligned addresses
- movl sp@(FR_HW+8),d1 | grab VA
+ movl %sp@(FR_HW+8),%d1 | grab VA
btst #27,d0 | check for mis-aligned access
jeq Lberr3 | no, skip
- addl #28,d1 | yes, get into next page
+ addl #28,%d1 | yes, get into next page
| operand case: 3,
| instruction case: 4+12+12
- andl #PG_FRAME,d1 | and truncate
+ andl #PG_FRAME,%d1 | and truncate
Lberr3:
- movl d1,sp@-
- movl d0,sp@- | code is FSLW now.
- andw #0x1f80,d0
+ movl %d1,%sp@-
+ movl %d0,%sp@- | code is FSLW now.
+ andw #0x1f80,%d0
jeq Lisberr
- movl #T_MMUFLT,sp@- | show that we are an MMU fault
+ movl #T_MMUFLT,%sp@- | show that we are an MMU fault
jra _ASM_LABEL(faultstkadj) | and deal with it
#endif /* defined(M68060) */
#if defined(M68040)
- .globl _C_LABEL(buserr40)
-_C_LABEL(buserr40):
- clrl sp@- | stack adjust count
- moveml #0xFFFF,sp@- | save user registers
- movl usp,a0 | save the user SP
- movl a0,sp@(FR_SP) | in the savearea
- movl sp@(FR_HW+20),d1 | get fault address
- moveq #0,d0
- movw sp@(FR_HW+12),d0 | get SSW
- btst #11,d0 | check for mis-aligned
+ENTRY_NOPROFILE(buserr40)
+ clrl %sp@- | stack adjust count
+ moveml #0xFFFF,%sp@- | save user registers
+ movl %usp,%a0 | save the user SP
+ movl %a0,%sp@(FR_SP) | in the savearea
+ movl %sp@(FR_HW+20),%d1 | get fault address
+ moveq #0,%d0
+ movw %sp@(FR_HW+12),%d0 | get SSW
+ btst #11,%d0 | check for mis-aligned
jeq Lbe1stpg | no skip
- addl #3,d1 | get into next page
- andl #PG_FRAME,d1 | and truncate
+ addl #3,%d1 | get into next page
+ andl #PG_FRAME,%d1 | and truncate
Lbe1stpg:
- movl d1,sp@- | pass fault address.
- movl d0,sp@- | pass SSW as code
- btst #10,d0 | test ATC
+ movl %d1,%sp@- | pass fault address.
+ movl %d0,%sp@- | pass SSW as code
+ btst #10,%d0 | test ATC
jeq Lisberr | it is a bus error
- movl #T_MMUFLT,sp@- | show that we are an MMU fault
+ movl #T_MMUFLT,%sp@- | show that we are an MMU fault
jra _ASM_LABEL(faultstkadj) | and deal with it
#endif /* defined(M68040) */
#if defined(M68020) || defined(M68030)
- .globl _C_LABEL(buserr2030), _C_LABEL(addrerr2030)
-_C_LABEL(buserr2030):
-_C_LABEL(addrerr2030):
- clrl sp@- | stack adjust count
- moveml #0xFFFF,sp@- | save user registers
- movl usp,a0 | save the user SP
- movl a0,sp@(FR_SP) | in the savearea
- moveq #0,d0
- movw sp@(FR_HW+10),d0 | grab SSW for fault processing
- btst #12,d0 | RB set?
+ENTRY_NOPROFILE(buserr2030)
+ENTRY_NOPROFILE(addrerr2030)
+ clrl %sp@- | stack adjust count
+ moveml #0xFFFF,%sp@- | save user registers
+ movl %usp,%a0 | save the user SP
+ movl %a0,%sp@(FR_SP) | in the savearea
+ moveq #0,%d0
+ movw %sp@(FR_HW+10),%d0 | grab SSW for fault processing
+ btst #12,%d0 | RB set?
jeq LbeX0 | no, test RC
- bset #14,d0 | yes, must set FB
- movw d0,sp@(FR_HW+10) | for hardware too
+ bset #14,%d0 | yes, must set FB
+ movw %d0,%sp@(FR_HW+10) | for hardware too
LbeX0:
- btst #13,d0 | RC set?
+ btst #13,%d0 | RC set?
jeq LbeX1 | no, skip
- bset #15,d0 | yes, must set FC
- movw d0,sp@(FR_HW+10) | for hardware too
+ bset #15,%d0 | yes, must set FC
+ movw %d0,%sp@(FR_HW+10) | for hardware too
LbeX1:
- btst #8,d0 | data fault?
+ btst #8,%d0 | data fault?
jeq Lbe0 | no, check for hard cases
- movl sp@(FR_HW+16),d1 | fault address is as given in frame
+ movl %sp@(FR_HW+16),%d1 | fault address is as given in frame
jra Lbe10 | thats it
Lbe0:
- btst #4,sp@(FR_HW+6) | long (type B) stack frame?
+ btst #4,%sp@(FR_HW+6) | long (type B) stack frame?
jne Lbe4 | yes, go handle
- movl sp@(FR_HW+2),d1 | no, can use save PC
- btst #14,d0 | FB set?
+ movl %sp@(FR_HW+2),%d1 | no, can use save PC
+ btst #14,%d0 | FB set?
jeq Lbe3 | no, try FC
- addql #4,d1 | yes, adjust address
+ addql #4,%d1 | yes, adjust address
jra Lbe10 | done
Lbe3:
- btst #15,d0 | FC set?
+ btst #15,%d0 | FC set?
jeq Lbe10 | no, done
- addql #2,d1 | yes, adjust address
+ addql #2,%d1 | yes, adjust address
jra Lbe10 | done
Lbe4:
- movl sp@(FR_HW+36),d1 | long format, use stage B address
- btst #15,d0 | FC set?
+ movl %sp@(FR_HW+36),%d1 | long format, use stage B address
+ btst #15,%d0 | FC set?
jeq Lbe10 | no, all done
- subql #2,d1 | yes, adjust address
+ subql #2,%d1 | yes, adjust address
Lbe10:
- movl d1,sp@- | push fault VA
- movl d0,sp@- | and padded SSW
- movw sp@(FR_HW+8+6),d0 | get frame format/vector offset
- andw #0x0FFF,d0 | clear out frame format
- cmpw #12,d0 | address error vector?
+ movl %d1,sp@- | push fault VA
+ movl %d0,sp@- | and padded SSW
+ movw %sp@(FR_HW+8+6),%d0 | get frame format/vector offset
+ andw #0x0FFF,%d0 | clear out frame format
+ cmpw #12,%d0 | address error vector?
jeq Lisaerr | yes, go to it
- movl d1,a0 | fault address
- movl sp@,d0 | function code from ssw
Home |
Main Index |
Thread Index |
Old Index