[src/trunk]: src/sys/arch/m68k/fpe rename round() to fpu_round() to avoid a n...

[chs <chs%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/e28b4fe5ecf2
branches:  trunk
changeset: 503950:e28b4fe5ecf2
user:      chs <chs%NetBSD.org@localhost>
date:      Sun Feb 18 20:05:58 2001 +0000

description:
rename round() to fpu_round() to avoid a name conflict with
the "round" assembly function in FPSP when building with ELF.

diffstat:

 sys/arch/m68k/fpe/fpu_emulate.h |   4 ++--
 sys/arch/m68k/fpe/fpu_implode.c |  20 ++++++++++----------
 sys/arch/m68k/fpe/fpu_int.c     |   4 ++--
 3 files changed, 14 insertions(+), 14 deletions(-)

diffs (126 lines):

diff -r 1ce7b21eddb8 -r e28b4fe5ecf2 sys/arch/m68k/fpe/fpu_emulate.h
--- a/sys/arch/m68k/fpe/fpu_emulate.h   Sun Feb 18 19:40:25 2001 +0000
+++ b/sys/arch/m68k/fpe/fpu_emulate.h   Sun Feb 18 20:05:58 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: fpu_emulate.h,v 1.7 2000/09/22 19:47:58 is Exp $       */
+/*     $NetBSD: fpu_emulate.h,v 1.8 2001/02/18 20:05:58 chs Exp $      */
 
 /*
  * Copyright (c) 1995 Gordon Ross
@@ -270,7 +270,7 @@
 /*
  * Round a number according to the round mode in FPCR
  */
-int    round __P((register struct fpemu *fe, register struct fpn *fp));
+int    fpu_round __P((register struct fpemu *fe, register struct fpn *fp));
 
 /* type conversion */
 void   fpu_explode __P((struct fpemu *fe, struct fpn *fp, int t, u_int *src));
diff -r 1ce7b21eddb8 -r e28b4fe5ecf2 sys/arch/m68k/fpe/fpu_implode.c
--- a/sys/arch/m68k/fpe/fpu_implode.c   Sun Feb 18 19:40:25 2001 +0000
+++ b/sys/arch/m68k/fpe/fpu_implode.c   Sun Feb 18 20:05:58 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: fpu_implode.c,v 1.4 1999/05/30 20:17:48 briggs Exp $ */
+/*     $NetBSD: fpu_implode.c,v 1.5 2001/02/18 20:05:58 chs Exp $ */
 
 /*
  * Copyright (c) 1992, 1993
@@ -77,7 +77,7 @@
  * responsibility to fix this if necessary.
  */
 int
-round(register struct fpemu *fe, register struct fpn *fp)
+fpu_round(register struct fpemu *fe, register struct fpn *fp)
 {
        register u_int m0, m1, m2;
        register int gr, s;
@@ -207,7 +207,7 @@
                 * into last mantissa word (this will not exceed 0xffffffff),
                 * shifting any guard and round bits out into the sticky
                 * bit.  Then ``round'' towards zero, i.e., just set an
-                * inexact exception if sticky is set (see round()).
+                * inexact exception if sticky is set (see fpu_round()).
                 * If the result is > 0x80000000, or is positive and equals
                 * 0x80000000, overflow; otherwise the last fraction word
                 * is the result.
@@ -218,7 +218,7 @@
                if (fpu_shr(fp, FP_NMANT - 1 - FP_NG - exp) != 0)
                        /* m68881/2 do not underflow when
                           converting to integer */;
-               round(fe, fp);
+               fpu_round(fe, fp);
                i = fp->fp_mant[2];
                if (i >= ((u_int)0x80000000 + sign))
                        break;
@@ -288,7 +288,7 @@
                fe->fe_fpsr |= FPSR_UNFL;
                /* -NG for g,r; -SNG_FRACBITS-exp for fraction */
                (void) fpu_shr(fp, FP_NMANT - FP_NG - SNG_FRACBITS - exp);
-               if (round(fe, fp) && fp->fp_mant[2] == SNG_EXP(1))
+               if (fpu_round(fe, fp) && fp->fp_mant[2] == SNG_EXP(1))
                        return (sign | SNG_EXP(1) | 0);
                if (fe->fe_fpsr & FPSR_INEX2)
                        fe->fe_fpsr |= FPSR_UNFL
@@ -301,7 +301,7 @@
        if ((fp->fp_mant[2] & SNG_EXP(1 << FP_NG)) == 0)
                panic("fpu_ftos");
 #endif
-       if (round(fe, fp) && fp->fp_mant[2] == SNG_EXP(2))
+       if (fpu_round(fe, fp) && fp->fp_mant[2] == SNG_EXP(2))
                exp++;
        if (exp >= SNG_EXP_INFNAN) {
                /* overflow to inf or to max single */
@@ -351,7 +351,7 @@
        if ((exp = fp->fp_exp + DBL_EXP_BIAS) <= 0) {
                fe->fe_fpsr |= FPSR_UNFL;
                (void) fpu_shr(fp, FP_NMANT - FP_NG - DBL_FRACBITS - exp);
-               if (round(fe, fp) && fp->fp_mant[1] == DBL_EXP(1)) {
+               if (fpu_round(fe, fp) && fp->fp_mant[1] == DBL_EXP(1)) {
                        res[1] = 0;
                        return (sign | DBL_EXP(1) | 0);
                }
@@ -362,7 +362,7 @@
                goto done;
        }
        (void) fpu_shr(fp, FP_NMANT - FP_NG - 1 - DBL_FRACBITS);
-       if (round(fe, fp) && fp->fp_mant[1] == DBL_EXP(2))
+       if (fpu_round(fe, fp) && fp->fp_mant[1] == DBL_EXP(2))
                exp++;
        if (exp >= DBL_EXP_INFNAN) {
                fe->fe_fpsr |= FPSR_OPERR | FPSR_INEX2 | FPSR_OVFL;
@@ -423,7 +423,7 @@
                /* I'm not sure about this <=... exp==0 doesn't mean
                   it's a denormal in extended format */
                (void) fpu_shr(fp, FP_NMANT - FP_NG - EXT_FRACBITS - exp);
-               if (round(fe, fp) && fp->fp_mant[1] == EXT_EXPLICIT1) {
+               if (fpu_round(fe, fp) && fp->fp_mant[1] == EXT_EXPLICIT1) {
                        res[1] = res[2] = 0;
                        return (sign | EXT_EXP(1) | 0);
                }
@@ -436,7 +436,7 @@
 #if (FP_NMANT - FP_NG - EXT_FRACBITS) > 0
        (void) fpu_shr(fp, FP_NMANT - FP_NG - EXT_FRACBITS);
 #endif
-       if (round(fe, fp) && fp->fp_mant[0] == EXT_EXPLICIT2)
+       if (fpu_round(fe, fp) && fp->fp_mant[0] == EXT_EXPLICIT2)
                exp++;
        if (exp >= EXT_EXP_INFNAN) {
                fe->fe_fpsr |= FPSR_OPERR | FPSR_INEX2 | FPSR_OVFL;
diff -r 1ce7b21eddb8 -r e28b4fe5ecf2 sys/arch/m68k/fpe/fpu_int.c
--- a/sys/arch/m68k/fpe/fpu_int.c       Sun Feb 18 19:40:25 2001 +0000
+++ b/sys/arch/m68k/fpe/fpu_int.c       Sun Feb 18 20:05:58 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: fpu_int.c,v 1.3 2000/09/22 19:47:59 is Exp $   */
+/*     $NetBSD: fpu_int.c,v 1.4 2001/02/18 20:05:58 chs Exp $  */
 
 /*
  * Copyright (c) 1995 Ken Nakata
@@ -99,7 +99,7 @@
 
   fpu_shr(x, rsh - FP_NG);     /* shift to the right */
 
-  if (round(fe, x) == 1 /* rounded up */ &&
+  if (fpu_round(fe, x) == 1 /* rounded up */ &&
       x->fp_mant[2 - (FP_NMANT-rsh)/32] & (1 << ((FP_NMANT-rsh)%32))
       /* x >= 2.0 */) {
     rsh--;                     /* reduce shift count by 1 */