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[src/trunk]: src/sys/arch/arm/xscale Add a few more register definitions.



details:   https://anonhg.NetBSD.org/src/rev/3f763703652e
branches:  trunk
changeset: 553947:3f763703652e
user:      scw <scw%NetBSD.org@localhost>
date:      Thu Oct 23 09:29:36 2003 +0000

description:
Add a few more register definitions.

diffstat:

 sys/arch/arm/xscale/ixp425reg.h |  12 +++++++++++-
 1 files changed, 11 insertions(+), 1 deletions(-)

diffs (33 lines):

diff -r f41d1ceb7dd4 -r 3f763703652e sys/arch/arm/xscale/ixp425reg.h
--- a/sys/arch/arm/xscale/ixp425reg.h   Thu Oct 23 09:25:44 2003 +0000
+++ b/sys/arch/arm/xscale/ixp425reg.h   Thu Oct 23 09:29:36 2003 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: ixp425reg.h,v 1.12 2003/10/08 14:55:04 scw Exp $ */
+/*     $NetBSD: ixp425reg.h,v 1.13 2003/10/23 09:29:36 scw Exp $ */
 /*
  * Copyright (c) 2003
  *     Ichiro FUKUHARA <ichiro%ichiro.org@localhost>.
@@ -147,6 +147,14 @@
 #define        OST_TIM1_INT            (1U << 1)
 #define        OST_TIM0_INT            (1U << 0)
 
+#define        IXP425_OST_WDOG         0x0014
+#define        IXP425_OST_WDOG_ENAB    0x0018
+#define        IXP425_OST_WDOG_KEY     0x001c
+#define        OST_WDOG_KEY_MAJICK     0x482e
+#define        OST_WDOG_ENAB_RST_ENA   (1u << 0)
+#define        OST_WDOG_ENAB_INT_ENA   (1u << 1)
+#define        OST_WDOG_ENAB_CNT_ENA   (1u << 2)
+
 /*
  * Interrupt Controller Unit.
  *  PA 0xc8003000
@@ -268,6 +276,8 @@
 #define        EXP_TIMING_CS5_OFFSET           0x0014
 #define        EXP_TIMING_CS6_OFFSET           0x0018
 #define        EXP_TIMING_CS7_OFFSET           0x001c
+#define EXP_CNFG0_OFFSET               0x0020
+#define EXP_CNFG1_OFFSET               0x0024
 
 #define IXP425_EXP_RECOVERY_SHIFT      16
 #define IXP425_EXP_HOLD_SHIFT          20



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