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[src/bjh21-hydra]: src/sys/arch Catch up with -current.
details: https://anonhg.NetBSD.org/src/rev/33733401ac1f
branches: bjh21-hydra
changeset: 538372:33733401ac1f
user: bjh21 <bjh21%NetBSD.org@localhost>
date: Sat Nov 09 16:10:23 2002 +0000
description:
Catch up with -current.
diffstat:
sys/arch/acorn32/acorn32/conf.c | 12 +-
sys/arch/arm/conf/files.footbridge | 3 +-
sys/arch/arm/footbridge/Makefile | 4 +-
sys/arch/arm/footbridge/dc21285reg.h | 4 +-
sys/arch/arm/footbridge/footbridge.c | 16 +-
sys/arch/arm/footbridge/footbridge_clock.c | 9 +-
sys/arch/arm/footbridge/footbridge_com.c | 11 +-
sys/arch/arm/footbridge/footbridge_intr.h | 174 +++++-
sys/arch/arm/footbridge/footbridge_irq.S | 508 ++---------------
sys/arch/arm/footbridge/footbridge_irqhandler.c | 700 ++++++++++++-----------
sys/arch/arm/footbridge/footbridge_irqhandler.h | 37 +-
sys/arch/arm/footbridge/footbridge_pci.c | 20 +-
sys/arch/arm/footbridge/genassym.cf | 46 -
sys/arch/arm/footbridge/isa/isa_machdep.c | 209 +++---
sys/arch/arm/include/ansi.h | 8 +-
sys/arch/arm/include/byte_swap.h | 12 +-
sys/arch/arm/include/stdarg.h | 25 +-
sys/arch/arm/include/varargs.h | 18 +-
18 files changed, 765 insertions(+), 1051 deletions(-)
diffs (truncated from 2443 to 300 lines):
diff -r f7f1ddb4f07f -r 33733401ac1f sys/arch/acorn32/acorn32/conf.c
--- a/sys/arch/acorn32/acorn32/conf.c Sat Oct 26 10:26:38 2002 +0000
+++ b/sys/arch/acorn32/acorn32/conf.c Sat Nov 09 16:10:23 2002 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: conf.c,v 1.8 2002/09/06 13:18:43 gehenna Exp $ */
+/* $NetBSD: conf.c,v 1.8.2.1 2002/11/09 16:10:23 bjh21 Exp $ */
/*
* Copyright (c) 1994-1998 Mark Brinicombe.
@@ -51,16 +51,6 @@
#include "com.h"
/*
- * Returns true if dev is /dev/mem or /dev/kmem.
- */
-int
-iskmemdev(dev)
- dev_t dev;
-{
- return (major(dev) == mem_no && minor(dev) < 2);
-}
-
-/*
* This entire table could be autoconfig()ed but that would mean that
* the kernel's idea of the console would be out of sync with that of
* the standalone boot. I think it best that they both use the same
diff -r f7f1ddb4f07f -r 33733401ac1f sys/arch/arm/conf/files.footbridge
--- a/sys/arch/arm/conf/files.footbridge Sat Oct 26 10:26:38 2002 +0000
+++ b/sys/arch/arm/conf/files.footbridge Sat Nov 09 16:10:23 2002 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: files.footbridge,v 1.9 2002/10/18 20:03:02 thorpej Exp $
+# $NetBSD: files.footbridge,v 1.9.2.1 2002/11/09 16:15:35 bjh21 Exp $
#
# Shared footbridge files information
@@ -12,6 +12,7 @@
file arch/arm/footbridge/footbridge_irq.S footbridge
file arch/arm/footbridge/footbridge_irqhandler.c footbridge
file arch/arm/footbridge/footbridge_clock.c footbridge
+file arch/arm/arm/softintr.c footbridge
# DC21285 "Footbridge" serial port
device fcom: tty, bus_space_generic
diff -r f7f1ddb4f07f -r 33733401ac1f sys/arch/arm/footbridge/Makefile
--- a/sys/arch/arm/footbridge/Makefile Sat Oct 26 10:26:38 2002 +0000
+++ b/sys/arch/arm/footbridge/Makefile Sat Nov 09 16:10:23 2002 +0000
@@ -1,7 +1,7 @@
-# $NetBSD: Makefile,v 1.1.6.1 2002/10/24 22:33:48 bjh21 Exp $
+# $NetBSD: Makefile,v 1.1.6.2 2002/11/09 16:15:36 bjh21 Exp $
KDIR= /sys/arch/arm/footbridge
INCSDIR= /usr/include/arm/footbridge
-INCS= footbridge_intr.h footbridge_irqhandler.h
+INCS= footbridge_intr.h
.include <bsd.kinc.mk>
diff -r f7f1ddb4f07f -r 33733401ac1f sys/arch/arm/footbridge/dc21285reg.h
--- a/sys/arch/arm/footbridge/dc21285reg.h Sat Oct 26 10:26:38 2002 +0000
+++ b/sys/arch/arm/footbridge/dc21285reg.h Sat Nov 09 16:10:23 2002 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: dc21285reg.h,v 1.2 2002/09/28 10:34:02 chris Exp $ */
+/* $NetBSD: dc21285reg.h,v 1.2.2.1 2002/11/09 16:15:36 bjh21 Exp $ */
/*
* Copyright (c) 1997,1998 Mark Brinicombe.
@@ -316,7 +316,7 @@
#define IRQ_SERR 0x17
#define IRQ_SDRAM_PARITY 0x18
#define IRQ_I2O 0x19
-#define IRQ_RESERVED4 0x1A
+#define IRQ_RESERVED3 0x1A
#define IRQ_DISCARD_TIMER 0x1B
#define IRQ_DATA_PARITY 0x1C
#define IRQ_MASTER_ABORT 0x1D
diff -r f7f1ddb4f07f -r 33733401ac1f sys/arch/arm/footbridge/footbridge.c
--- a/sys/arch/arm/footbridge/footbridge.c Sat Oct 26 10:26:38 2002 +0000
+++ b/sys/arch/arm/footbridge/footbridge.c Sat Nov 09 16:10:23 2002 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: footbridge.c,v 1.10 2002/10/02 05:02:30 thorpej Exp $ */
+/* $NetBSD: footbridge.c,v 1.10.2.1 2002/11/09 16:15:36 bjh21 Exp $ */
/*
* Copyright (c) 1997,1998 Mark Brinicombe.
@@ -183,19 +183,19 @@
/* bus_space_write_4(sc->sc_iot, sc->sc_ioh, 0x18, 0x40000000);*/
/* Install a generic handler to catch a load of system interrupts */
- sc->sc_serr_ih = intr_claim(IRQ_SERR, IPL_NONE,
+ sc->sc_serr_ih = footbridge_intr_claim(IRQ_SERR, IPL_HIGH,
"serr", footbridge_intr, sc);
- sc->sc_sdram_par_ih = intr_claim(IRQ_SDRAM_PARITY, IPL_NONE,
+ sc->sc_sdram_par_ih = footbridge_intr_claim(IRQ_SDRAM_PARITY, IPL_HIGH,
"sdram parity", footbridge_intr, sc);
- sc->sc_data_par_ih = intr_claim(IRQ_DATA_PARITY, IPL_NONE,
+ sc->sc_data_par_ih = footbridge_intr_claim(IRQ_DATA_PARITY, IPL_HIGH,
"data parity", footbridge_intr, sc);
- sc->sc_master_abt_ih = intr_claim(IRQ_MASTER_ABORT, IPL_NONE,
+ sc->sc_master_abt_ih = footbridge_intr_claim(IRQ_MASTER_ABORT, IPL_HIGH,
"mast abt", footbridge_intr, sc);
- sc->sc_target_abt_ih = intr_claim(IRQ_TARGET_ABORT, IPL_NONE,
+ sc->sc_target_abt_ih = footbridge_intr_claim(IRQ_TARGET_ABORT, IPL_HIGH,
"targ abt", footbridge_intr, sc);
- sc->sc_parity_ih = intr_claim(IRQ_PARITY, IPL_NONE,
+ sc->sc_parity_ih = footbridge_intr_claim(IRQ_PARITY, IPL_HIGH,
"parity", footbridge_intr, sc);
-
+
/* Set up the PCI bus tags */
footbridge_create_io_bs_tag(&footbridge_pci_io_bs_tag,
(void *)DC21285_PCI_IO_VBASE);
diff -r f7f1ddb4f07f -r 33733401ac1f sys/arch/arm/footbridge/footbridge_clock.c
--- a/sys/arch/arm/footbridge/footbridge_clock.c Sat Oct 26 10:26:38 2002 +0000
+++ b/sys/arch/arm/footbridge/footbridge_clock.c Sat Nov 09 16:10:23 2002 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: footbridge_clock.c,v 1.13 2002/10/10 23:19:13 chris Exp $ */
+/* $NetBSD: footbridge_clock.c,v 1.13.2.1 2002/11/09 16:15:37 bjh21 Exp $ */
/*
* Copyright (c) 1997 Mark Brinicombe.
@@ -244,7 +244,8 @@
int statvarticks;
/* statint == num in counter to drop by desired hz */
- statint = clock_sc->sc_statclock_count = load_timer(TIMER_2_BASE, hz);
+ statint = statprev = clock_sc->sc_statclock_count =
+ load_timer(TIMER_2_BASE, hz);
/* Get the total ticks a second */
countpersecond = statint * hz;
@@ -290,7 +291,7 @@
*/
clock_sc->sc_clock_ticks_per_256us =
((((clock_sc->sc_clock_count * hz) / 1000) * 256) / 1000);
- clock_sc->sc_clockintr = intr_claim(IRQ_TIMER_1, IPL_CLOCK,
+ clock_sc->sc_clockintr = footbridge_intr_claim(IRQ_TIMER_1, IPL_CLOCK,
"tmr1 hard clk", clockhandler, 0);
if (clock_sc->sc_clockintr == NULL)
@@ -301,7 +302,7 @@
if (stathz) {
/* Setup timer 2 and claim interrupt */
setstatclockrate(stathz);
- clock_sc->sc_statclockintr = intr_claim(IRQ_TIMER_2, IPL_STATCLOCK,
+ clock_sc->sc_statclockintr = footbridge_intr_claim(IRQ_TIMER_2, IPL_STATCLOCK,
"tmr2 stat clk", statclockhandler, 0);
if (clock_sc->sc_statclockintr == NULL)
panic("%s: Cannot install timer 2 interrupt handler",
diff -r f7f1ddb4f07f -r 33733401ac1f sys/arch/arm/footbridge/footbridge_com.c
--- a/sys/arch/arm/footbridge/footbridge_com.c Sat Oct 26 10:26:38 2002 +0000
+++ b/sys/arch/arm/footbridge/footbridge_com.c Sat Nov 09 16:10:23 2002 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: footbridge_com.c,v 1.8.2.1 2002/10/24 22:33:48 bjh21 Exp $ */
+/* $NetBSD: footbridge_com.c,v 1.8.2.2 2002/11/09 16:15:37 bjh21 Exp $ */
/*-
* Copyright (c) 1997 Mark Brinicombe
@@ -36,6 +36,7 @@
*/
#include "opt_ddb.h"
+#include "opt_ddbparam.h"
#include <sys/param.h>
#include <sys/systm.h>
@@ -211,8 +212,8 @@
}
printf("\n");
- sc->sc_ih = intr_claim(sc->sc_rx_irq, IPL_SERIAL, "serial rx",
- fcom_rxintr, sc);
+ sc->sc_ih = footbridge_intr_claim(sc->sc_rx_irq, IPL_SERIAL,
+ "serial rx", fcom_rxintr, sc);
if (sc->sc_ih == NULL)
panic("%s: Cannot install rx interrupt handler",
sc->sc_dev.dv_xname);
@@ -601,7 +602,7 @@
break;
byte = bus_space_read_4(iot, ioh, UART_DATA);
status = bus_space_read_4(iot, ioh, UART_RX_STAT);
-#if DDB_KEYCODE > 0
+#if defined(DDB) && DDB_KEYCODE > 0
/*
* Temporary hack so that I can force the kernel into
* the debugger via the serial port
@@ -799,7 +800,7 @@
c = bus_space_read_4(iot, ioh, UART_DATA);
stat = bus_space_read_4(iot, ioh, UART_RX_STAT);
(void)splx(s);
-#if DDB_KEYCODE > 0
+#if defined(DDB) && DDB_KEYCODE > 0
/*
* Temporary hack so that I can force the kernel into
* the debugger via the serial port
diff -r f7f1ddb4f07f -r 33733401ac1f sys/arch/arm/footbridge/footbridge_intr.h
--- a/sys/arch/arm/footbridge/footbridge_intr.h Sat Oct 26 10:26:38 2002 +0000
+++ b/sys/arch/arm/footbridge/footbridge_intr.h Sat Nov 09 16:10:23 2002 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: footbridge_intr.h,v 1.1 2002/09/28 15:53:03 chris Exp $ */
+/* $NetBSD: footbridge_intr.h,v 1.1.6.1 2002/11/09 16:15:37 bjh21 Exp $ */
/*
* Copyright (c) 1997 Mark Brinicombe.
@@ -36,22 +36,28 @@
#ifndef _FOOTBRIDGE_INTR_H_
#define _FOOTBRIDGE_INTR_H_
+#include <arm/armreg.h>
+
/* Define the various Interrupt Priority Levels */
/* Hardware Interrupt Priority Levels are not mutually exclusive. */
-#define IPL_BIO 0 /* block I/O */
-#define IPL_NET 1 /* network */
-#define IPL_TTY 2 /* terminal */
-#define IPL_IMP 3 /* memory allocation */
-#define IPL_AUDIO 4 /* audio */
-#define IPL_CLOCK 5 /* clock */
-#define IPL_STATCLOCK 6 /* statclock */
-#define IPL_HIGH 7 /* */
-#define IPL_SERIAL 8 /* serial */
-#define IPL_NONE 9
+#define IPL_NONE 0 /* nothing */
+#define IPL_SOFT 1 /* generic soft interrupts */
+#define IPL_SOFTCLOCK 2 /* clock software interrupts */
+#define IPL_SOFTNET 3 /* network software interrupts */
+#define IPL_BIO 4 /* block I/O */
+#define IPL_NET 5 /* network */
+#define IPL_SOFTSERIAL 6 /* serial software interrupts */
+#define IPL_TTY 7 /* terminal */
+#define IPL_IMP 8 /* memory allocation */
+#define IPL_AUDIO 9 /* audio */
+#define IPL_CLOCK 10 /* clock */
+#define IPL_STATCLOCK 11 /* statclock */
+#define IPL_HIGH 12 /* everything */
+#define IPL_SERIAL 13 /* serial */
-#define IPL_LEVELS 10
+#define NIPL 14
#define IST_UNUSABLE -1 /* interrupt cannot be used */
#define IST_NONE 0 /* none (dummy) */
@@ -59,15 +65,145 @@
#define IST_EDGE 2 /* edge-triggered */
#define IST_LEVEL 3 /* level-triggered */
-/* Software interrupt priority levels */
+#define __NEWINTR /* enables new hooks in cpu_fork()/cpu_switch() */
+
+#ifndef _LOCORE
+#include <arm/cpufunc.h>
+
+#include <arm/footbridge/dc21285mem.h>
+#include <arm/footbridge/dc21285reg.h>
+
+#define INT_SWMASK \
+ ((1U << IRQ_SOFTINT) | (1U << IRQ_RESERVED0) | \
+ (1U << IRQ_RESERVED1) | (1U << IRQ_RESERVED2))
+#define ICU_INT_HWMASK (0xffffffff & ~(INT_SWMASK | (1U << IRQ_RESERVED3)))
+
+/* only call this with interrupts off */
+static __inline void __attribute__((__unused__))
+ footbridge_set_intrmask(void)
+{
+ extern __volatile uint32_t intr_enabled;
+ /* fetch once so we write the same number to both registers */
+ uint32_t tmp = intr_enabled & ICU_INT_HWMASK;
+
+ ((__volatile uint32_t*)(DC21285_ARMCSR_VBASE))[IRQ_ENABLE_SET>>2] = tmp;
+ ((__volatile uint32_t*)(DC21285_ARMCSR_VBASE))[IRQ_ENABLE_CLEAR>>2] = ~tmp;
+}
+
+static __inline void __attribute__((__unused__))
+footbridge_splx(int newspl)
+{
+ extern __volatile uint32_t intr_enabled;
+ extern __volatile int current_spl_level;
+ extern __volatile int footbridge_ipending;
+ extern void footbridge_do_pending(void);
+ int oldirqstate, hwpend;
+
+ current_spl_level = newspl;
+
+ hwpend = (footbridge_ipending & ICU_INT_HWMASK) & ~newspl;
+ if (hwpend != 0) {
+ oldirqstate = disable_interrupts(I32_bit);
+ intr_enabled |= hwpend;
+ footbridge_set_intrmask();
+ restore_interrupts(oldirqstate);
+ }
+
+ if ((footbridge_ipending & INT_SWMASK) & ~newspl)
+ footbridge_do_pending();
+}
+
+static __inline int __attribute__((__unused__))
+footbridge_splraise(int ipl)
+{
+ extern __volatile int current_spl_level;
+ extern int footbridge_imask[];
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