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[src/trunk]: src/sys/arch/evbarm/iq80310 The Npwr has a 19-bit timer. Make s...



details:   https://anonhg.NetBSD.org/src/rev/e5d07991c8f4
branches:  trunk
changeset: 521936:e5d07991c8f4
user:      thorpej <thorpej%NetBSD.org@localhost>
date:      Fri Feb 08 23:50:53 2002 +0000

description:
The Npwr has a 19-bit timer.  Make sure values programmed into
the counter fit.

diffstat:

 sys/arch/evbarm/iq80310/iq80310_timer.c |  16 ++++++++++++++--
 1 files changed, 14 insertions(+), 2 deletions(-)

diffs (39 lines):

diff -r 242771b10646 -r e5d07991c8f4 sys/arch/evbarm/iq80310/iq80310_timer.c
--- a/sys/arch/evbarm/iq80310/iq80310_timer.c   Fri Feb 08 20:04:14 2002 +0000
+++ b/sys/arch/evbarm/iq80310/iq80310_timer.c   Fri Feb 08 23:50:53 2002 +0000
@@ -1,7 +1,7 @@
-/*     $NetBSD: iq80310_timer.c,v 1.6 2001/12/01 02:04:27 thorpej Exp $        */
+/*     $NetBSD: iq80310_timer.c,v 1.7 2002/02/08 23:50:53 thorpej Exp $        */
 
 /*
- * Copyright (c) 2001 Wasabi Systems, Inc.
+ * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
  * All rights reserved.
  *
  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
@@ -58,6 +58,16 @@
 #include <evbarm/iq80310/iq80310var.h>
 #include <evbarm/iq80310/obiovar.h>
 
+/*
+ * Some IQ80310-based designs have fewer bits in the timer counter.
+ * Deal with them here.
+ */
+#if defined(IOP310_TEAMASA_NPWR)
+#define        COUNTER_MASK            ((1U << 20) - 1)
+#else /* Default to stock IQ80310 */
+#define COUNTER_MASK           ((1U << 23) - 1)
+#endif /* list of IQ80310-based designs */
+
 #define        COUNTS_PER_SEC          33000000        /* 33MHz */
 #define        COUNTS_PER_USEC         (COUNTS_PER_SEC / 1000000)
 
@@ -114,6 +124,8 @@
 timer_write(uint32_t x)
 {
 
+       KASSERT((x & COUNTER_MASK) == x);
+
        CPLD_WRITE(IQ80310_TIMER_LA0, x & 0xff);
        CPLD_WRITE(IQ80310_TIMER_LA1, (x >> 8) & 0xff);
        CPLD_WRITE(IQ80310_TIMER_LA2, (x >> 16) & 0x3f);



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