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[src/trunk]: src/sys/arch/arm/xscale Map the expansion bus registers.



details:   https://anonhg.NetBSD.org/src/rev/22fbc22dd0a8
branches:  trunk
changeset: 553948:22fbc22dd0a8
user:      scw <scw%NetBSD.org@localhost>
date:      Thu Oct 23 09:32:17 2003 +0000

description:
Map the expansion bus registers.

diffstat:

 sys/arch/arm/xscale/ixp425.c    |  11 +++++++++--
 sys/arch/arm/xscale/ixp425var.h |  12 ++++++++++--
 2 files changed, 19 insertions(+), 4 deletions(-)

diffs (65 lines):

diff -r 3f763703652e -r 22fbc22dd0a8 sys/arch/arm/xscale/ixp425.c
--- a/sys/arch/arm/xscale/ixp425.c      Thu Oct 23 09:29:36 2003 +0000
+++ b/sys/arch/arm/xscale/ixp425.c      Thu Oct 23 09:32:17 2003 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: ixp425.c,v 1.6 2003/10/08 14:55:04 scw Exp $ */
+/*     $NetBSD: ixp425.c,v 1.7 2003/10/23 09:32:17 scw Exp $ */
 
 /*
  * Copyright (c) 2003
@@ -34,7 +34,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ixp425.c,v 1.6 2003/10/08 14:55:04 scw Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ixp425.c,v 1.7 2003/10/23 09:32:17 scw Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -75,6 +75,13 @@
                panic("%s: unable to map GPIO registers", sc->sc_dev.dv_xname);
 
        /*
+        * Mapping for Expansion Bus Registers
+        */
+       if (bus_space_map(sc->sc_iot, IXP425_EXP_HWBASE, IXP425_EXP_SIZE,
+                         0, &sc->sc_exp_ioh))
+               panic("%s: unable to map EXP registers", sc->sc_dev.dv_xname);
+
+       /*
         * Invoke the board-specific PCI initialization code
         */
        ixp425_md_pci_init(sc);
diff -r 3f763703652e -r 22fbc22dd0a8 sys/arch/arm/xscale/ixp425var.h
--- a/sys/arch/arm/xscale/ixp425var.h   Thu Oct 23 09:29:36 2003 +0000
+++ b/sys/arch/arm/xscale/ixp425var.h   Thu Oct 23 09:32:17 2003 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: ixp425var.h,v 1.5 2003/10/08 14:55:04 scw Exp $ */
+/*     $NetBSD: ixp425var.h,v 1.6 2003/10/23 09:32:17 scw Exp $ */
 
 /*
  * Copyright (c) 2003
@@ -58,6 +58,13 @@
 #define        GPIO_CONF_READ_4(sc, reg) \
        bus_space_read_4(sc->sc_iot, sc->sc_gpio_ioh, reg)
 
+#define        EXP_CSR_WRITE_4(sc, reg, data)  \
+       bus_space_write_4(sc->sc_iot, sc->sc_exp_ioh,   \
+               reg, data)
+
+#define        EXP_CSR_READ_4(sc, reg) \
+       bus_space_read_4(sc->sc_iot, sc->sc_exp_ioh, reg)
+
 #define PCI_CONF_LOCK(s)       (s) = disable_interrupts(I32_bit)
 #define PCI_CONF_UNLOCK(s)     restore_interrupts((s))
 
@@ -70,7 +77,8 @@
 
        /* Handles for the various subregions. */
        bus_space_handle_t sc_pci_ioh;          /* PCI mem handler */
-       bus_space_handle_t sc_gpio_ioh; /* GPIOs handler */
+       bus_space_handle_t sc_gpio_ioh;         /* GPIOs handler */
+       bus_space_handle_t sc_exp_ioh;          /* Expansion Bus handler */
 
        /* Bus space, DMA, and PCI tags for the PCI bus */
        struct bus_space sc_pci_iot;



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