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[src/trunk]: src/sys/dev/pci -corrected "MSI" capability
details: https://anonhg.NetBSD.org/src/rev/f193b53a62dd
branches: trunk
changeset: 536752:f193b53a62dd
user: drochner <drochner%NetBSD.org@localhost>
date: Sat Sep 21 16:19:34 2002 +0000
description:
-corrected "MSI" capability
-added some new subclasses and capabilities
-move capability list printing into a separate function and call it
for each header type (not type 0 only)
diffstat:
sys/dev/pci/pci_subr.c | 146 ++++++++++++++++++++++++++++++------------------
1 files changed, 90 insertions(+), 56 deletions(-)
diffs (191 lines):
diff -r 7953c2dc48d4 -r f193b53a62dd sys/dev/pci/pci_subr.c
--- a/sys/dev/pci/pci_subr.c Sat Sep 21 16:18:30 2002 +0000
+++ b/sys/dev/pci/pci_subr.c Sat Sep 21 16:19:34 2002 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_subr.c,v 1.50 2002/05/19 00:01:09 sommerfeld Exp $ */
+/* $NetBSD: pci_subr.c,v 1.51 2002/09/21 16:19:34 drochner Exp $ */
/*
* Copyright (c) 1997 Zubin D. Dittia. All rights reserved.
@@ -40,7 +40,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.50 2002/05/19 00:01:09 sommerfeld Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.51 2002/09/21 16:19:34 drochner Exp $");
#ifdef _KERNEL_OPT
#include "opt_pci.h"
@@ -89,6 +89,7 @@
{ "IPI", PCI_SUBCLASS_MASS_STORAGE_IPI, },
{ "RAID", PCI_SUBCLASS_MASS_STORAGE_RAID, },
{ "ATA", PCI_SUBCLASS_MASS_STORAGE_ATA, },
+ { "SATA", PCI_SUBCLASS_MASS_STORAGE_SATA, },
{ "miscellaneous", PCI_SUBCLASS_MASS_STORAGE_MISC, },
{ 0 },
};
@@ -213,6 +214,8 @@
{ "RF", PCI_SUBCLASS_WIRELESS_RF, },
{ "bluetooth", PCI_SUBCLASS_WIRELESS_BLUETOOTH, },
{ "broadband", PCI_SUBCLASS_WIRELESS_BROADBAND, },
+ { "802.11a (5 GHz)", PCI_SUBCLASS_WIRELESS_802_11A, },
+ { "802.11b (2.4 GHz)", PCI_SUBCLASS_WIRELESS_802_11B, },
{ "miscellaneous", PCI_SUBCLASS_WIRELESS_MISC, },
{ 0 },
};
@@ -776,63 +779,84 @@
}
printf("\n");
printf(" Interrupt line: 0x%02x\n", PCI_INTERRUPT_LINE(rval));
+}
- if (regs[o2i(PCI_COMMAND_STATUS_REG)] & PCI_STATUS_CAPLIST_SUPPORT) {
- for (off = PCI_CAPLIST_PTR(regs[o2i(PCI_CAPLISTPTR_REG)]);
- off != 0;
- off = PCI_CAPLIST_NEXT(regs[o2i(off)])) {
- rval = regs[o2i(off)];
- printf(" Capability register at 0x%02x\n", off);
+static void
+pci_conf_print_caplist(
+#ifdef _KERNEL
+ pci_chipset_tag_t pc, pcitag_t tag,
+#endif
+ const pcireg_t *regs)
+{
+ int off;
+ pcireg_t rval;
+
+ for (off = PCI_CAPLIST_PTR(regs[o2i(PCI_CAPLISTPTR_REG)]);
+ off != 0;
+ off = PCI_CAPLIST_NEXT(regs[o2i(off)])) {
+ rval = regs[o2i(off)];
+ printf(" Capability register at 0x%02x\n", off);
- printf(" type: 0x%02x (", PCI_CAPLIST_CAP(rval));
- switch (PCI_CAPLIST_CAP(rval)) {
- case PCI_CAP_RESERVED0:
- printf("reserved");
- break;
- case PCI_CAP_PWRMGMT:
- printf("Power Management, rev. %d.0",
- (rval >> 0) & 0x07); /* XXX not clear */
- break;
- case PCI_CAP_AGP:
- printf("AGP, rev. %d.%d",
- (rval >> 24) & 0x0f,
- (rval >> 20) & 0x0f);
- break;
- case PCI_CAP_VPD:
- printf("VPD");
- break;
- case PCI_CAP_SLOTID:
- printf("SlotID");
- break;
- case PCI_CAP_MBI:
- printf("MBI");
- break;
- case PCI_CAP_CPCI_HOTSWAP:
- printf("CompactPCI Hot-swapping");
- break;
- case PCI_CAP_PCIX:
- printf("PCI-X");
- break;
- case PCI_CAP_LDT:
- printf("LDT");
- break;
- case PCI_CAP_VENDSPEC:
- printf("Vendor-specific");
- break;
- case PCI_CAP_DEBUGPORT:
- printf("Debug Port");
- break;
- case PCI_CAP_CPCI_RSRCCTL:
- printf("CompactPCI Resource Control");
- break;
- case PCI_CAP_HOTPLUG:
- printf("Hot-Plug");
- break;
- default:
- printf("unknown");
- }
- printf(")\n");
+ printf(" type: 0x%02x (", PCI_CAPLIST_CAP(rval));
+ switch (PCI_CAPLIST_CAP(rval)) {
+ case PCI_CAP_RESERVED0:
+ printf("reserved");
+ break;
+ case PCI_CAP_PWRMGMT:
+ printf("Power Management, rev. %d.0",
+ (rval >> 0) & 0x07); /* XXX not clear */
+ break;
+ case PCI_CAP_AGP:
+ printf("AGP, rev. %d.%d",
+ (rval >> 24) & 0x0f,
+ (rval >> 20) & 0x0f);
+ break;
+ case PCI_CAP_VPD:
+ printf("VPD");
+ break;
+ case PCI_CAP_SLOTID:
+ printf("SlotID");
+ break;
+ case PCI_CAP_MSI:
+ printf("MSI");
+ break;
+ case PCI_CAP_CPCI_HOTSWAP:
+ printf("CompactPCI Hot-swapping");
+ break;
+ case PCI_CAP_PCIX:
+ printf("PCI-X");
+ break;
+ case PCI_CAP_LDT:
+ printf("LDT");
+ break;
+ case PCI_CAP_VENDSPEC:
+ printf("Vendor-specific");
+ break;
+ case PCI_CAP_DEBUGPORT:
+ printf("Debug Port");
+ break;
+ case PCI_CAP_CPCI_RSRCCTL:
+ printf("CompactPCI Resource Control");
+ break;
+ case PCI_CAP_HOTPLUG:
+ printf("Hot-Plug");
+ break;
+ case PCI_CAP_AGP8:
+ printf("AGP 8x");
+ break;
+ case PCI_CAP_SECURE:
+ printf("Secure Device");
+ break;
+ case PCI_CAP_PCIEXPRESS:
+ printf("PCI Express");
+ break;
+ case PCI_CAP_MSIX:
+ printf("MSI-X");
+ break;
+ default:
+ printf("unknown");
}
+ printf(")\n");
}
}
@@ -1202,6 +1226,16 @@
hdrtype);
printf("\n");
+ /* papability list, if present */
+ if (regs[o2i(PCI_COMMAND_STATUS_REG)] & PCI_STATUS_CAPLIST_SUPPORT) {
+#ifdef _KERNEL
+ pci_conf_print_caplist(pc, tag, regs);
+#else
+ pci_conf_print_caplist(regs);
+#endif
+ printf("\n");
+ }
+
/* device-dependent header */
printf(" Device-dependent header:\n");
pci_conf_print_regs(regs, endoff, 256);
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