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[src/trunk]: src/sys/arch/next68k/next68k add % to register names
details: https://anonhg.NetBSD.org/src/rev/e582a9cb9678
branches: trunk
changeset: 480273:e582a9cb9678
user: dbj <dbj%NetBSD.org@localhost>
date: Sat Jan 08 12:38:27 2000 +0000
description:
add % to register names
use cpp macros for all symbol access
diffstat:
sys/arch/next68k/next68k/locore.s | 1317 ++++++++++++++++++------------------
1 files changed, 651 insertions(+), 666 deletions(-)
diffs (truncated from 2109 to 300 lines):
diff -r e9f0a428ccba -r e582a9cb9678 sys/arch/next68k/next68k/locore.s
--- a/sys/arch/next68k/next68k/locore.s Sat Jan 08 11:14:36 2000 +0000
+++ b/sys/arch/next68k/next68k/locore.s Sat Jan 08 12:38:27 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.s,v 1.20 1999/10/26 00:20:39 itohy Exp $ */
+/* $NetBSD: locore.s,v 1.21 2000/01/08 12:38:27 dbj Exp $ */
/*
* Copyright (c) 1998 Darrin B. Jewell
@@ -93,7 +93,7 @@
*/
#define _RELOC(var, ar) \
lea var,ar; \
- addl a5,ar
+ addl %a5,ar
#define RELOC(var, ar) _RELOC(_C_LABEL(var), ar)
#define ASRELOC(var, ar) _RELOC(_ASM_LABEL(var), ar)
@@ -119,61 +119,61 @@
BSS(esym,4)
ASENTRY_NOPROFILE(start)
- movw #PSL_HIGHIPL,sr | no interrupts
+ movw #PSL_HIGHIPL,%sr | no interrupts
- movl #CACHE_OFF,d0
- movc d0,cacr | clear and disable on-chip cache(s)
+ movl #CACHE_OFF,%d0
+ movc %d0,%cacr | clear and disable on-chip cache(s)
- moveal #NEXT_RAMBASE,a5 | amount to RELOC by.
+ moveal #NEXT_RAMBASE,%a5 | amount to RELOC by.
- RELOC(lowram,a0) | store base of memory.
- movl a5,a0@
+ RELOC(lowram,%a0) | store base of memory.
+ movl %a5,%a0@
- RELOC(esym, a0)
+ RELOC(esym, %a0)
#if 1
| @@@ bootloader hack,
- movel a5@,a4 | get this from base of mem.
- movl a4,a0@ | store end of symbol table
- clrl a5@
+ movel %a5@,%a4 | get this from base of mem.
+ movl %a4,%a0@ | store end of symbol table
+ clrl %a5@
#else
- clrl a0@ | no symbol table, yet
+ clrl %a0@ | no symbol table, yet
#endif
| Create a new stack at address tmpstk, and push
| The existing sp onto it as an arg for next68k_bootargs.
- ASRELOC(tmpstk, a0)
- movel sp,a0@-
- moveal a0,sp
- moveal #0,a6
+ ASRELOC(tmpstk, %a0)
+ movel %sp,%a0@-
+ moveal %a0,%sp
+ moveal #0,%a6
/* Read the header to get our segment list */
- RELOC(next68k_bootargs,a0)
- jbsr a0@ | next68k_bootargs(args)
- addqw #4,sp | clear arg from stack.
+ RELOC(next68k_bootargs,%a0)
+ jbsr %a0@ | next68k_bootargs(args)
+ addqw #4,%sp | clear arg from stack.
/*
* All data registers are now free. All address registers
- * except a5 are free. a5 is used by the RELOC() macro on hp300
+ * except %a5 are free. %a5 is used by the RELOC() macro on hp300
* and cannot be used until after the MMU is enabled.
*/
/* determine our CPU/MMU combo - check for all regardless of kernel config */
- movl #0x200,d0 | data freeze bit
- movc d0,cacr | only exists on 68030
- movc cacr,d0 | read it back
- tstl d0 | zero?
+ movl #0x200,%d0 | data freeze bit
+ movc %d0,%cacr | only exists on 68030
+ movc %cacr,%d0 | read it back
+ tstl %d0 | zero?
jeq Lnot68030 | yes, we have 68020/68040
/*
* 68030 models
*/
- RELOC(mmutype, a0) | no, we have 68030
- movl #MMU_68030,a0@ | set to reflect 68030 PMMU
- RELOC(cputype, a0)
- movl #CPU_68030,a0@ | and 68030 CPU
- RELOC(machineid, a0)
- movl #30,a0@ | @@@ useless
+ RELOC(mmutype, %a0) | no, we have 68030
+ movl #MMU_68030,%a0@ | set to reflect 68030 PMMU
+ RELOC(cputype, %a0)
+ movl #CPU_68030,%a0@ | and 68030 CPU
+ RELOC(machineid, %a0)
+ movl #30,%a0@ | @@@ useless
jra Lstart1
/*
@@ -181,30 +181,30 @@
*/
Lnot68030:
- bset #31,d0 | data cache enable bit
- movc d0,cacr | only exists on 68040
- movc cacr,d0 | read it back
- tstl d0 | zero?
+ bset #31,%d0 | data cache enable bit
+ movc %d0,%cacr | only exists on 68040
+ movc %cacr,%d0 | read it back
+ tstl %d0 | zero?
beq Lis68020 | yes, we have 68020
- moveq #0,d0 | now turn it back off
- movec d0,cacr | before we access any data
+ moveq #0,%d0 | now turn it back off
+ movec %d0,%cacr | before we access any data
/*
* 68040 models
*/
- RELOC(mmutype, a0)
- movl #MMU_68040,a0@ | with a 68040 MMU
- RELOC(cputype, a0)
- movl #CPU_68040,a0@ | and a 68040 CPU
- RELOC(fputype, a0)
- movl #FPU_68040,a0@ | ...and FPU
+ RELOC(mmutype, %a0)
+ movl #MMU_68040,%a0@ | with a 68040 MMU
+ RELOC(cputype, %a0)
+ movl #CPU_68040,%a0@ | and a 68040 CPU
+ RELOC(fputype, %a0)
+ movl #FPU_68040,%a0@ | ...and FPU
#if defined(ENABLE_HP_CODE)
- RELOC(ectype, a0)
- movl #EC_NONE,a0@ | and no cache (for now XXX)
+ RELOC(ectype, %a0)
+ movl #EC_NONE,%a0@ | and no cache (for now XXX)
#endif
- RELOC(machineid, a0)
- movl #40,a0@ | @@@ useless
+ RELOC(machineid, %a0)
+ movl #40,%a0@ | @@@ useless
jra Lstart1
/*
@@ -217,14 +217,14 @@
*/
Lis68020:
- RELOC(mmutype, a0)
- movl #MMU_68851,a0@ | no, we have PMMU
- RELOC(fputype, a0) | all of the 68020 systems
- movl #FPU_68881,a0@ | have a 68881 FPU
- RELOC(cputype, a0)
- movl #CPU_68020,a0@ | and a 68020 CPU
- RELOC(machineid, a0)
- movl #20,a0@ | @@@ useless
+ RELOC(mmutype, %a0)
+ movl #MMU_68851,%a0@ | no, we have PMMU
+ RELOC(fputype, %a0) | all of the 68020 systems
+ movl #FPU_68881,%a0@ | have a 68881 FPU
+ RELOC(cputype, %a0)
+ movl #CPU_68020,%a0@ | and a 68020 CPU
+ RELOC(machineid, %a0)
+ movl #20,%a0@ | @@@ useless
jra Lstart1
/*
@@ -239,27 +239,27 @@
* vectab+8 bus error
* vectab+12 address error
*/
- RELOC(cputype, a0)
+ RELOC(cputype, %a0)
#if 0
/* XXX assembler/linker feature/bug */
- RELOC(vectab, a2)
+ RELOC(vectab, %a2)
#else
- movl #_C_LABEL(vectab),a2
- addl a5,a2
+ movl #_C_LABEL(vectab),%a2
+ addl %a5,%a2
#endif
#if defined(M68040)
- cmpl #CPU_68040,a0@ | 68040?
+ cmpl #CPU_68040,%a0@ | 68040?
jne 1f | no, skip
- movl #_C_LABEL(buserr40),a2@(8)
- movl #_C_LABEL(addrerr4060),a2@(12)
+ movl #_C_LABEL(buserr40),%a2@(8)
+ movl #_C_LABEL(addrerr4060),%a2@(12)
jra Lstart2
1:
#endif
#if defined(M68020) || defined(M68030)
- cmpl #CPU_68040,a0@ | 68040?
+ cmpl #CPU_68040,%a0@ | 68040?
jeq 1f | yes, skip
- movl #_C_LABEL(busaddrerr2030),a2@(8)
- movl #_C_LABEL(busaddrerr2030),a2@(12)
+ movl #_C_LABEL(busaddrerr2030),%a2@(8)
+ movl #_C_LABEL(busaddrerr2030),%a2@(12)
jra Lstart2
1:
#endif
@@ -268,27 +268,27 @@
Lstart2:
/* initialize source/destination control registers for movs */
- moveq #FC_USERD,d0 | user space
- movc d0,sfc | as source
- movc d0,dfc | and destination of transfers
+ moveq #FC_USERD,%d0 | user space
+ movc %d0,sfc | as source
+ movc %d0,dfc | and destination of transfers
/* configure kernel and proc0 VA space so we can get going */
#ifdef DDB
- RELOC(esym,a0) | end of static kernel test/data/syms
- movl a0@,d5
+ RELOC(esym,%a0) | end of static kernel test/data/syms
+ movl %a0@,%d5
jne Lstart3
#endif
- movl #_C_LABEL(end),d5 | end of static kernel text/data
+ movl #_C_LABEL(end),%d5 | end of static kernel text/data
Lstart3:
- addl #NBPG-1,d5
- andl #PG_FRAME,d5 | round to a page
- movl d5,a4
- addl a5,a4 | convert to PA
- pea a5@ | firstpa
- pea a4@ | nextpa
- RELOC(pmap_bootstrap,a0)
- jbsr a0@ | pmap_bootstrap(firstpa,nextpa)
- addql #8,sp
+ addl #NBPG-1,%d5
+ andl #PG_FRAME,%d5 | round to a page
+ movl %d5,%a4
+ addl %a5,%a4 | convert to PA
+ pea %a5@ | firstpa
+ pea %a4@ | nextpa
+ RELOC(pmap_bootstrap,%a0)
+ jbsr %a0@ | pmap_bootstrap(firstpa,nextpa)
+ addql #8,%sp
/*
* Prepare to enable MMU.
@@ -300,41 +300,41 @@
*
* Is this all really necessary, or am I paranoid??
*/
- RELOC(Sysseg, a0) | system segment table addr
- movl a0@,d1 | read value (a KVA)
- addl a5,d1 | convert to PA
+ RELOC(Sysseg, %a0) | system segment table addr
+ movl %a0@,%d1 | read value (a KVA)
+ addl %a5,%d1 | convert to PA
- RELOC(mmutype, a0)
+ RELOC(mmutype, %a0)
#if defined(ENABLE_HP_CODE)
- tstl a0@ | HP MMU?
+ tstl %a0@ | HP MMU?
jeq Lhpmmu2 | yes, skip
#endif
- cmpl #MMU_68040,a0@ | 68040?
+ cmpl #MMU_68040,%a0@ | 68040?
jne Lmotommu1 | no, skip
- .long 0x4e7b1807 | movc d1,srp
+ .long 0x4e7b1807 | movc %d1,%srp
jra Lstploaddone
Lmotommu1:
- RELOC(protorp, a0)
- movl #0x80000202,a0@ | nolimit + share global + 4 byte PTEs
- movl d1,a0@(4) | + segtable address
- pmove a0@,srp | load the supervisor root pointer
- movl #0x80000002,a0@ | reinit upper half for CRP loads
+ RELOC(protorp, %a0)
+ movl #0x80000202,%a0@ | nolimit + share global + 4 byte PTEs
+ movl %d1,%a0@(4) | + segtable address
+ pmove %a0@,%srp | load the supervisor root pointer
+ movl #0x80000002,%a0@ | reinit upper half for CRP loads
#if defined(ENABLE_HP_CODE)
jra Lstploaddone | done
Lhpmmu2:
- moveq #PGSHIFT,d2
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