[src/trunk]: src/sys/arch/alpha/pci Because of the Cool sign-extension hack w...

To: source-changes-hg%NetBSD.org@localhost
Subject: [src/trunk]: src/sys/arch/alpha/pci Because of the Cool sign-extension hack w...
From: thorpej <thorpej%NetBSD.org@localhost>
Date: Fri, 24 Jan 2020 07:43:26 +0000
details:   https://anonhg.NetBSD.org/src/rev/d1067adcf63e
branches:  trunk
changeset: 493849:d1067adcf63e
user:      thorpej <thorpej%NetBSD.org@localhost>
date:      Mon Jun 26 02:42:10 2000 +0000

description:
Because of the Cool sign-extension hack we use to access PCI space,
the `get window' method ends up with the wrong physical address to
pass onto userspace (which wants to mmap the space).

Compensate by adding a CHIP_PHYSADDR() macro which un-hacks the address
suitably for mapping with other-than-KSEG.

diffstat:

 sys/arch/alpha/pci/irongate_bus_io.c         |   6 ++++--
 sys/arch/alpha/pci/irongate_bus_mem.c        |   6 ++++--
 sys/arch/alpha/pci/irongatereg.h             |   9 ++++++++-
 sys/arch/alpha/pci/pci_bwx_bus_io_chipdep.c  |  12 +++++++++---
 sys/arch/alpha/pci/pci_bwx_bus_mem_chipdep.c |  12 +++++++++---
 sys/arch/alpha/pci/tsp_bus_io.c              |   6 ++++--
 sys/arch/alpha/pci/tsp_bus_mem.c             |   4 +++-
 sys/arch/alpha/pci/tsreg.h                   |   9 ++++++++-
 8 files changed, 49 insertions(+), 15 deletions(-)

diffs (211 lines):

diff -r 440d96ce980a -r d1067adcf63e sys/arch/alpha/pci/irongate_bus_io.c
--- a/sys/arch/alpha/pci/irongate_bus_io.c      Mon Jun 26 02:42:04 2000 +0000
+++ b/sys/arch/alpha/pci/irongate_bus_io.c      Mon Jun 26 02:42:10 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: irongate_bus_io.c,v 1.1 2000/06/01 20:30:30 thorpej Exp $ */
+/* $NetBSD: irongate_bus_io.c,v 1.2 2000/06/26 02:42:10 thorpej Exp $ */
 
 /*-
  * Copyright (c) 2000 The NetBSD Foundation, Inc.
@@ -38,7 +38,7 @@
 
 #include <sys/cdefs.h>                 /* RCS ID & Copyright macro defns */
 
-__KERNEL_RCSID(1, "$NetBSD: irongate_bus_io.c,v 1.1 2000/06/01 20:30:30 thorpej Exp $");
+__KERNEL_RCSID(1, "$NetBSD: irongate_bus_io.c,v 1.2 2000/06/26 02:42:10 thorpej Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -59,6 +59,8 @@
 
 #define        CHIP_IO_SYS_START(v)    IRONGATE_IO_BASE
 
+#define        CHIP_PHYSADDR(x)        IRONGATE_PHYSADDR(x)
+
 /*
  * AMD 751 core logic appears on EV6.  We require at least EV56
  * support for the assembler to emit BWX opcodes.
diff -r 440d96ce980a -r d1067adcf63e sys/arch/alpha/pci/irongate_bus_mem.c
--- a/sys/arch/alpha/pci/irongate_bus_mem.c     Mon Jun 26 02:42:04 2000 +0000
+++ b/sys/arch/alpha/pci/irongate_bus_mem.c     Mon Jun 26 02:42:10 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: irongate_bus_mem.c,v 1.1 2000/06/01 20:30:30 thorpej Exp $ */
+/* $NetBSD: irongate_bus_mem.c,v 1.2 2000/06/26 02:42:10 thorpej Exp $ */
 
 /*-
  * Copyright (c) 2000 The NetBSD Foundation, Inc.
@@ -38,7 +38,7 @@
 
 #include <sys/cdefs.h>                 /* RCS ID & Copyright macro defns */
 
-__KERNEL_RCSID(1, "$NetBSD: irongate_bus_mem.c,v 1.1 2000/06/01 20:30:30 thorpej Exp $");
+__KERNEL_RCSID(1, "$NetBSD: irongate_bus_mem.c,v 1.2 2000/06/26 02:42:10 thorpej Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -59,6 +59,8 @@
 
 #define        CHIP_MEM_SYS_START(v)   IRONGATE_MEM_BASE
 
+#define        CHIP_PHYSADDR(x)        IRONGATE_PHYSADDR(x)
+
 /* 
  * AMD 751 core logic appears on EV6.  We require at least EV56 
  * support for the assembler to emit BWX opcodes. 
diff -r 440d96ce980a -r d1067adcf63e sys/arch/alpha/pci/irongatereg.h
--- a/sys/arch/alpha/pci/irongatereg.h  Mon Jun 26 02:42:04 2000 +0000
+++ b/sys/arch/alpha/pci/irongatereg.h  Mon Jun 26 02:42:10 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: irongatereg.h,v 1.1 2000/06/01 20:30:31 thorpej Exp $ */
+/* $NetBSD: irongatereg.h,v 1.2 2000/06/26 02:42:10 thorpej Exp $ */
 
 /*-
  * Copyright (c) 2000 The NetBSD Foundation, Inc.
@@ -63,6 +63,13 @@
  * AMD 751 (also in PCI config space): 0001.fe00.0000
  */
 
+/*
+ * This hack allows us to map the I/O address space without using
+ * the KSEG sign extension hack.
+ */
+#define        IRONGATE_PHYSADDR(x)                                            \
+       (((x) & ~0x0100##0000##0000) | 0x0800##0000##0000)
+
 #define        IRONGATE_KSEG_BIAS      0x0100##0000##0000UL
 
 #define        IRONGATE_MEM_BASE       (IRONGATE_KSEG_BIAS | 0x0000##0000##0000UL)
diff -r 440d96ce980a -r d1067adcf63e sys/arch/alpha/pci/pci_bwx_bus_io_chipdep.c
--- a/sys/arch/alpha/pci/pci_bwx_bus_io_chipdep.c       Mon Jun 26 02:42:04 2000 +0000
+++ b/sys/arch/alpha/pci/pci_bwx_bus_io_chipdep.c       Mon Jun 26 02:42:10 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_bwx_bus_io_chipdep.c,v 1.9 2000/04/17 17:30:48 drochner Exp $ */
+/* $NetBSD: pci_bwx_bus_io_chipdep.c,v 1.10 2000/06/26 02:42:10 thorpej Exp $ */
 
 /*-
  * Copyright (c) 1997, 1998, 2000 The NetBSD Foundation, Inc.
@@ -213,6 +213,10 @@
 #define        CHIP_IO_EX_STORE_SIZE(v)        (sizeof __C(CHIP, _io_ex_storage))
 #endif
 
+#ifndef        CHIP_PHYSADDR
+#define        CHIP_PHYSADDR(x)        (x)
+#endif
+
 void
 __C(CHIP,_bus_io_init)(t, v)
        bus_space_tag_t t;
@@ -336,8 +340,10 @@
        case 0:
                abst->abst_bus_start = 0;
                abst->abst_bus_end = 0xffffffffUL;
-               abst->abst_sys_start = CHIP_IO_SYS_START(v);
-               abst->abst_sys_end = CHIP_IO_SYS_START(v) + abst->abst_bus_end;
+               abst->abst_sys_start =
+                   CHIP_PHYSADDR(CHIP_IO_SYS_START(v));
+               abst->abst_sys_end =
+                   CHIP_PHYSADDR(CHIP_IO_SYS_START(v) + abst->abst_bus_end);
                abst->abst_addr_shift = 0;
                abst->abst_size_shift = 0;
                abst->abst_flags = ABST_DENSE|ABST_BWX;
diff -r 440d96ce980a -r d1067adcf63e sys/arch/alpha/pci/pci_bwx_bus_mem_chipdep.c
--- a/sys/arch/alpha/pci/pci_bwx_bus_mem_chipdep.c      Mon Jun 26 02:42:04 2000 +0000
+++ b/sys/arch/alpha/pci/pci_bwx_bus_mem_chipdep.c      Mon Jun 26 02:42:10 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_bwx_bus_mem_chipdep.c,v 1.10 2000/04/17 17:30:48 drochner Exp $ */
+/* $NetBSD: pci_bwx_bus_mem_chipdep.c,v 1.11 2000/06/26 02:42:10 thorpej Exp $ */
 
 /*-
  * Copyright (c) 1997, 1998, 2000 The NetBSD Foundation, Inc.
@@ -213,6 +213,10 @@
 #define        CHIP_MEM_EX_STORE_SIZE(v)       (sizeof __C(CHIP,_mem_ex_storage))
 #endif
 
+#ifndef        CHIP_PHYSADDR
+#define        CHIP_PHYSADDR(x)        (x)
+#endif
+
 void
 __C(CHIP,_bus_mem_init)(t, v)
        bus_space_tag_t t;
@@ -330,8 +334,10 @@
        case 0:
                abst->abst_bus_start = 0;
                abst->abst_bus_end = 0xffffffffUL;
-               abst->abst_sys_start = CHIP_MEM_SYS_START(v);
-               abst->abst_sys_end = CHIP_MEM_SYS_START(v) + abst->abst_bus_end;
+               abst->abst_sys_start =
+                   CHIP_PHYSADDR(CHIP_MEM_SYS_START(v));
+               abst->abst_sys_end =
+                   CHIP_PHYSADDR(CHIP_MEM_SYS_START(v) + abst->abst_bus_end);
                abst->abst_addr_shift = 0;
                abst->abst_size_shift = 0;
                abst->abst_flags = ABST_DENSE|ABST_BWX;
diff -r 440d96ce980a -r d1067adcf63e sys/arch/alpha/pci/tsp_bus_io.c
--- a/sys/arch/alpha/pci/tsp_bus_io.c   Mon Jun 26 02:42:04 2000 +0000
+++ b/sys/arch/alpha/pci/tsp_bus_io.c   Mon Jun 26 02:42:10 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tsp_bus_io.c,v 1.2 1999/12/02 19:43:58 thorpej Exp $ */
+/* $NetBSD: tsp_bus_io.c,v 1.3 2000/06/26 02:42:10 thorpej Exp $ */
 
 /*-
  * Copyright (c) 1999 by Ross Harvey.  All rights reserved.
@@ -33,7 +33,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(1, "$NetBSD: tsp_bus_io.c,v 1.2 1999/12/02 19:43:58 thorpej Exp $");
+__KERNEL_RCSID(1, "$NetBSD: tsp_bus_io.c,v 1.3 2000/06/26 02:42:10 thorpej Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -60,6 +60,8 @@
 
 #define CHIP_IO_SYS_START(v)    (((TSPCON)(v))->pc_iobase | P_PCI_IO)
 
+#define        CHIP_PHYSADDR(x)        TS_PHYSADDR(x)
+
 /*
  * Tsunami core logic appears on EV6.  We require at least EV56
  * support for the assembler to emit BWX opcodes.
diff -r 440d96ce980a -r d1067adcf63e sys/arch/alpha/pci/tsp_bus_mem.c
--- a/sys/arch/alpha/pci/tsp_bus_mem.c  Mon Jun 26 02:42:04 2000 +0000
+++ b/sys/arch/alpha/pci/tsp_bus_mem.c  Mon Jun 26 02:42:10 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tsp_bus_mem.c,v 1.2 1999/12/02 19:43:58 thorpej Exp $ */
+/* $NetBSD: tsp_bus_mem.c,v 1.3 2000/06/26 02:42:11 thorpej Exp $ */
 
 /*-
  * Copyright (c) 1999 by Ross Harvey.  All rights reserved.
@@ -54,6 +54,8 @@
 
 #define CHIP_MEM_SYS_START(v)    (((struct tsp_config *)(v))->pc_iobase)
 
+#define        CHIP_PHYSADDR(x)        TS_PHYSADDR(x)
+
 /* 
  * Tsunami core logic appears on EV6.  We require at least EV56          
  * support for the assembler to emit BWX opcodes.
diff -r 440d96ce980a -r d1067adcf63e sys/arch/alpha/pci/tsreg.h
--- a/sys/arch/alpha/pci/tsreg.h        Mon Jun 26 02:42:04 2000 +0000
+++ b/sys/arch/alpha/pci/tsreg.h        Mon Jun 26 02:42:10 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tsreg.h,v 1.1 1999/06/29 06:46:47 ross Exp $ */
+/* $NetBSD: tsreg.h,v 1.2 2000/06/26 02:42:11 thorpej Exp $ */
 
 /*-
  * Copyright (c) 1999 by Ross Harvey.  All rights reserved.
@@ -69,6 +69,13 @@
  */
 
 /*
+ * This hack allows us to map the I/O address space without using
+ * the KSEG sign extention hack.
+ */
+#define        TS_PHYSADDR(x)                                                  \
+       (((x) & ~0x0100##0000##0000) | 0x0800##0000##0000)
+
+/*
  * Cchip CSR Map
  */
Prev by Date: [src/trunk]: src/sys/arch/mips Abandon {mips1, mips3}_TBRPL()s which have litt...
Next by Date: [src/trunk]: src/lib/libc/arch Thinko in previous: we do always use an intern...
Previous by Thread: [src/trunk]: src/sys/arch/mips Abandon {mips1, mips3}_TBRPL()s which have litt...
Next by Thread: [src/trunk]: src/lib/libc/arch Thinko in previous: we do always use an intern...
Indexes:
Home | Main Index | Thread Index | Old Index