Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/sys/arch/sparc64/sparc64 Add signal trampoline for 64-bit sv...
details: https://anonhg.NetBSD.org/src/rev/4bde43999f58
branches: trunk
changeset: 503389:4bde43999f58
user: eeh <eeh%NetBSD.org@localhost>
date: Mon Feb 05 06:56:45 2001 +0000
description:
Add signal trampoline for 64-bit svr4 emulations.
diffstat:
sys/arch/sparc64/sparc64/locore.s | 140 ++++++++++++++++++++++++++++++++++++-
1 files changed, 136 insertions(+), 4 deletions(-)
diffs (189 lines):
diff -r c863a92d7134 -r 4bde43999f58 sys/arch/sparc64/sparc64/locore.s
--- a/sys/arch/sparc64/sparc64/locore.s Mon Feb 05 06:32:55 2001 +0000
+++ b/sys/arch/sparc64/sparc64/locore.s Mon Feb 05 06:56:45 2001 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.s,v 1.109 2000/12/31 21:05:21 eeh Exp $ */
+/* $NetBSD: locore.s,v 1.110 2001/02/05 06:56:45 eeh Exp $ */
/*
* Copyright (c) 1996-2000 Eduardo Horvath
* Copyright (c) 1996 Paul Kranenburg
@@ -94,7 +94,7 @@
#ifdef COMPAT_SUNOS
#include <compat/sunos/sunos_syscall.h>
#endif
-#ifdef COMPAT_SVR4
+#if defined(COMPAT_SVR4) || defined(COMPAT_SVR4_32)
#include <compat/svr4/svr4_syscall.h>
#endif
#ifdef COMPAT_NETBSD32
@@ -5631,8 +5631,9 @@
add %l0, %l3, %l3
0:
stxa %l6, [%l6] ASI_DMMU_DEMAP
+ add %l6, %l4, %l6
+ membar #Sync
stxa %l5, [%l5] ASI_DMMU_DEMAP ! Demap it
- add %l6, %l4, %l6
membar #Sync
cmp %l5, %l3
bleu 0b
@@ -6811,7 +6812,7 @@
_C_LABEL(sunos_esigcode):
#endif /* COMPAT_SUNOS */
-#ifdef COMPAT_SVR4
+#if (defined(_LP64) && defined(COMPAT_SVR4)) || defined(COMPAT_SVR4_32)
/*
* This code is still 32-bit only.
*/
@@ -6839,9 +6840,15 @@
* will eventually be removed, with a hole left in its place, if things
* work out.
*/
+#ifdef _LP64
+ .globl _C_LABEL(svr4_32_sigcode)
+ .globl _C_LABEL(svr4_32_esigcode)
+_C_LABEL(svr4_32_sigcode):
+#else
.globl _C_LABEL(svr4_sigcode)
.globl _C_LABEL(svr4_esigcode)
_C_LABEL(svr4_sigcode):
+#endif
/*
* XXX the `save' and `restore' below are unnecessary: should
* replace with simple arithmetic on %sp
@@ -6933,9 +6940,134 @@
! setcontext does not return unless it fails
mov SYS_exit, %g1 ! exit(errno)
t ST_SYSCALL
+#ifdef _LP64
+_C_LABEL(svr4_32_esigcode):
+#else
_C_LABEL(svr4_esigcode):
+#endif
#endif /* COMPAT_SVR4 */
+#if defined(COMPAT_SVR4) && defined(_LP64)
+/*
+ * XXXXX Not implemented yet
+ *
+ * The following code is copied to the top of the user stack when each
+ * process is exec'ed, and signals are `trampolined' off it.
+ *
+ * When this code is run, the stack looks like:
+ * [%sp] 128 bytes to which registers can be dumped
+ * [%sp + 128 + 8] pointer to saved siginfo
+ * [%sp + 128 + 16] pointer to saved context
+ * [%sp + 128 + 24] address of the user's handler
+ * [%sp + 128 + 32] first word of saved state (context)
+ * .
+ * .
+ * .
+ * [%sp + NNN] last word of saved state
+ * (followed by previous stack contents or top of signal stack).
+ * The address of the function to call is in %g1; the old %g1 and %o0
+ * have already been saved in the sigcontext. We are running in a clean
+ * window, all previous windows now being saved to the stack.
+ *
+ * Note that [%sp + 128 + 8] == %sp + 128 + 16. The copy at %sp+128+8
+ * will eventually be removed, with a hole left in its place, if things
+ * work out.
+ */
+ .globl _C_LABEL(svr4_sigcode)
+ .globl _C_LABEL(svr4_esigcode)
+_C_LABEL(svr4_sigcode):
+ /*
+ * XXX the `save' and `restore' below are unnecessary: should
+ * replace with simple arithmetic on %sp
+ *
+ * Make room on the stack for 64 %f registers + %fsr. This comes
+ * out to 64*4+8 or 264 bytes, but this must be aligned to a multiple
+ * of 64, or 320 bytes.
+ */
+ save %sp, -CC64FSZ - 320, %sp
+ mov %g2, %l2 ! save globals in %l registers
+ mov %g3, %l3
+ mov %g4, %l4
+ mov %g5, %l5
+ mov %g6, %l6
+ mov %g7, %l7
+ /*
+ * Saving the fpu registers is expensive, so do it iff it is
+ * enabled and dirty.
+ */
+ rd %fprs, %l0
+ btst FPRS_DL|FPRS_DU, %l0 ! All clean?
+ bz,pt %icc, 2f
+ btst FPRS_DL, %l0 ! test dl
+ bz,pt %icc, 1f
+ btst FPRS_DU, %l0 ! test du
+
+ ! fpu is enabled, oh well
+ stx %fsr, [%sp + CC64FSZ + BIAS + 0]
+ add %sp, BIAS+CC64FSZ+BLOCK_SIZE, %l0 ! Generate a pointer so we can
+ andn %l0, BLOCK_ALIGN, %l0 ! do a block store
+ stda %f0, [%l0] ASI_BLK_P
+ inc BLOCK_SIZE, %l0
+ stda %f16, [%l0] ASI_BLK_P
+1:
+ bz,pt %icc, 2f
+ add %sp, BIAS+CC64FSZ+BLOCK_SIZE, %l0 ! Generate a pointer so we can
+ andn %l0, BLOCK_ALIGN, %l0 ! do a block store
+ add %l0, 2*BLOCK_SIZE, %l0 ! and skip what we already stored
+ stda %f32, [%l0] ASI_BLK_P
+ inc BLOCK_SIZE, %l0
+ stda %f48, [%l0] ASI_BLK_P
+2:
+ membar #StoreLoad
+ rd %y, %l1 ! in any case, save %y
+ ldx [%fp + BIAS + 128], %o0 ! sig
+ ldx [%fp + BIAS + 128 + 8], %o1 ! siginfo
+ call %g1 ! (*sa->sa_handler)(sig,siginfo,uctx)
+ ldx [%fp + BIAS + 128 + 24], %o2 ! uctx
+
+ /*
+ * Now that the handler has returned, re-establish all the state
+ * we just saved above, then do a sigreturn.
+ */
+ btst 3, %l0 ! All clean?
+ bz,pt %icc, 2f
+ btst 1, %l0 ! test dl
+ bz,pt %icc, 1f
+ btst 2, %l0 ! test du
+
+ ldx [%sp + CC64FSZ + BIAS + 0], %fsr
+ add %sp, BIAS+CC64FSZ+BLOCK_SIZE, %l0 ! Generate a pointer so we can
+ andn %l0, BLOCK_ALIGN, %l0 ! do a block load
+ ldda [%l0] ASI_BLK_P, %f0
+ inc BLOCK_SIZE, %o0
+ ldda [%l0] ASI_BLK_P, %f16
+1:
+ bz,pt %icc, 2f
+ wr %l1, %g0, %y ! in any case, restore %y
+ add %sp, BIAS+CC64FSZ+BLOCK_SIZE, %l0 ! Generate a pointer so we can
+ andn %l0, BLOCK_ALIGN, %l0 ! do a block load
+ inc 2*BLOCK_SIZE, %o0 ! and skip what we already loaded
+ ldda [%l0] ASI_BLK_P, %f32
+ inc BLOCK_SIZE, %o0
+ ldda [%l0] ASI_BLK_P, %f48
+2:
+ mov %l2, %g2
+ mov %l3, %g3
+ mov %l4, %g4
+ mov %l5, %g5
+ mov %l6, %g6
+ mov %l7, %g7
+
+ restore %g0, SVR4_SYS_context, %g1 ! get registers back & set syscall #
+ mov 1, %o0
+ add %sp, BIAS + 128 + 24, %o1 ! compute ucontextp
+ t ST_SYSCALL ! svr4_context(1, ucontextp)
+ ! setcontext does not return unless it fails
+ mov SYS_exit, %g1 ! exit(errno)
+ t ST_SYSCALL
+_C_LABEL(svr4_esigcode):
+#endif
+
/*
* Primitives
*/
Home |
Main Index |
Thread Index |
Old Index