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[src/trunk]: src/sys/arch/mips/mips Make whitespace in multi-way loops line u...
details: https://anonhg.NetBSD.org/src/rev/bbce9e50693a
branches: trunk
changeset: 543110:bbce9e50693a
user: simonb <simonb%NetBSD.org@localhost>
date: Mon Feb 17 12:32:13 2003 +0000
description:
Make whitespace in multi-way loops line up a bit nicer.
diffstat:
sys/arch/mips/mips/cache_r5k.c | 20 ++++++++++----------
1 files changed, 10 insertions(+), 10 deletions(-)
diffs (63 lines):
diff -r b56c77642afa -r bbce9e50693a sys/arch/mips/mips/cache_r5k.c
--- a/sys/arch/mips/mips/cache_r5k.c Mon Feb 17 12:24:13 2003 +0000
+++ b/sys/arch/mips/mips/cache_r5k.c Mon Feb 17 12:32:13 2003 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cache_r5k.c,v 1.6 2002/11/07 23:03:21 cgd Exp $ */
+/* $NetBSD: cache_r5k.c,v 1.7 2003/02/17 12:32:13 simonb Exp $ */
/*
* Copyright 2001 Wasabi Systems, Inc.
@@ -153,14 +153,14 @@
while ((eva - va) >= (16 * 32)) {
cache_r4k_op_16lines_32_2way(va, w2va,
CACHE_R4K_I|CACHEOP_R4K_INDEX_INV);
- va += (16 * 32);
+ va += (16 * 32);
w2va += (16 * 32);
}
while (va < eva) {
- cache_op_r4k_line(va, CACHE_R4K_I|CACHEOP_R4K_INDEX_INV);
+ cache_op_r4k_line( va, CACHE_R4K_I|CACHEOP_R4K_INDEX_INV);
cache_op_r4k_line(w2va, CACHE_R4K_I|CACHEOP_R4K_INDEX_INV);
- va += 32;
+ va += 32;
w2va += 32;
}
}
@@ -345,14 +345,14 @@
while ((eva - va) >= (16 * 16)) {
cache_r4k_op_16lines_16_2way(va, w2va,
CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
- va += (16 * 16);
+ va += (16 * 16);
w2va += (16 * 16);
}
while (va < eva) {
- cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
+ cache_op_r4k_line( va, CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
cache_op_r4k_line(w2va, CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
- va += 16;
+ va += 16;
w2va += 16;
}
}
@@ -377,14 +377,14 @@
while ((eva - va) >= (16 * 32)) {
cache_r4k_op_16lines_32_2way(va, w2va,
CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
- va += (16 * 32);
+ va += (16 * 32);
w2va += (16 * 32);
}
while (va < eva) {
- cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
+ cache_op_r4k_line( va, CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
cache_op_r4k_line(w2va, CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
- va += 32;
+ va += 32;
w2va += 32;
}
}
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