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[src/trunk]: src/sys/arch/arm/xscale In iopiic_wait(), latched status bits in...



details:   https://anonhg.NetBSD.org/src/rev/d65e065991b1
branches:  trunk
changeset: 572505:d65e065991b1
user:      scw <scw%NetBSD.org@localhost>
date:      Thu Jan 06 09:34:02 2005 +0000

description:
In iopiic_wait(), latched status bits in the ISR is cleared by writing
ones to the appropriate bits, not zeroes. In this case, just write the
value from a previous read of the register.

diffstat:

 sys/arch/arm/xscale/iopi2c.c |  11 ++++++++---
 1 files changed, 8 insertions(+), 3 deletions(-)

diffs (32 lines):

diff -r 48b04d1f4e03 -r d65e065991b1 sys/arch/arm/xscale/iopi2c.c
--- a/sys/arch/arm/xscale/iopi2c.c      Thu Jan 06 00:47:34 2005 +0000
+++ b/sys/arch/arm/xscale/iopi2c.c      Thu Jan 06 09:34:02 2005 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: iopi2c.c,v 1.1 2003/10/06 16:06:06 thorpej Exp $       */
+/*     $NetBSD: iopi2c.c,v 1.2 2005/01/06 09:34:02 scw Exp $   */
 
 /*
  * Copyright (c) 2003 Wasabi Systems, Inc.
@@ -40,7 +40,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: iopi2c.c,v 1.1 2003/10/06 16:06:06 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: iopi2c.c,v 1.2 2005/01/06 09:34:02 scw Exp $");
 
 #include <sys/param.h>
 #include <sys/lock.h>
@@ -151,7 +151,12 @@
                printf("%s: iopiic_wait, (%08x) error %d: ISR = 0x%08x\n",
                    sc->sc_dev.dv_xname, bit, error, isr);
 
-       bus_space_write_4(sc->sc_st, sc->sc_sh, IIC_ISR, 0);
+       /*
+        * The IIC_ISR is Read/Clear apart from the bottom 4 bits, which are
+        * read-only. So simply write back our copy of the ISR to clear any
+        * latched status.
+        */
+       bus_space_write_4(sc->sc_st, sc->sc_sh, IIC_ISR, isr);
 
        return (error);
 }



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