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[src/trunk]: src/gnu/dist/gcc/gcc/config/sparc Avoid outputing illegal assemb...



details:   https://anonhg.NetBSD.org/src/rev/20d54c7c53c9
branches:  trunk
changeset: 551641:20d54c7c53c9
user:      martin <martin%NetBSD.org@localhost>
date:      Tue Sep 09 21:26:20 2003 +0000

description:
Avoid outputing illegal assembler code for shifts by constants out of
bounds. Gcc bugzilla ticket 11965; update previous patch to the final
version accepted by the gcc people.

diffstat:

 gnu/dist/gcc/gcc/config/sparc/sparc.c  |   4 ++
 gnu/dist/gcc/gcc/config/sparc/sparc.md |  58 ++++++++++++++-------------------
 2 files changed, 28 insertions(+), 34 deletions(-)

diffs (117 lines):

diff -r c4dc2be5caf9 -r 20d54c7c53c9 gnu/dist/gcc/gcc/config/sparc/sparc.c
--- a/gnu/dist/gcc/gcc/config/sparc/sparc.c     Tue Sep 09 21:03:15 2003 +0000
+++ b/gnu/dist/gcc/gcc/config/sparc/sparc.c     Tue Sep 09 21:26:20 2003 +0000
@@ -8028,6 +8028,10 @@
   if (which_alternative != 2)
     operands[3] = operands[0];
 
+  /* We can only shift by constants <= 63. */
+  if (GET_CODE (operands[2]) == CONST_INT)
+    operands[2] = GEN_INT (INTVAL (operands[2]) & 0x3f);
+
   if (GET_CODE (operands[1]) == CONST_INT)
     {
       output_asm_insn ("mov\t%1, %3", operands);
diff -r c4dc2be5caf9 -r 20d54c7c53c9 gnu/dist/gcc/gcc/config/sparc/sparc.md
--- a/gnu/dist/gcc/gcc/config/sparc/sparc.md    Tue Sep 09 21:03:15 2003 +0000
+++ b/gnu/dist/gcc/gcc/config/sparc/sparc.md    Tue Sep 09 21:26:20 2003 +0000
@@ -6882,14 +6882,7 @@
   if (operands[2] == const1_rtx)
     return "add\t%1, %1, %0";
   if (GET_CODE (operands[2]) == CONST_INT)
-    {
-      if ((unsigned HOST_WIDE_INT) INTVAL (operands[2]) >= 32)
-        {
-          if (TARGET_ARCH64)
-            return "sllx\t%1, %2, %0";
-          operands[2] = GEN_INT (INTVAL (operands[2]) & 0x1f);
-        }
-    }
+    operands[2] = GEN_INT (INTVAL (operands[2]) & 0x1f);
   return "sll\t%1, %2, %0";
 }
   [(set (attr "type")
@@ -6919,6 +6912,8 @@
 {
   if (operands[2] == const1_rtx)
     return "add\t%1, %1, %0";
+  if (GET_CODE (operands[2]) == CONST_INT)
+    operands[2] = GEN_INT (INTVAL (operands[2]) & 0x3f);
   return "sllx\t%1, %2, %0";
 }
   [(set (attr "type")
@@ -6978,18 +6973,11 @@
        (ashiftrt:SI (match_operand:SI 1 "register_operand" "r")
                     (match_operand:SI 2 "arith_operand" "rI")))]
   ""
-{
-  if (GET_CODE (operands[2]) == CONST_INT)
-    {
-      if ((unsigned HOST_WIDE_INT) INTVAL (operands[2]) >= 32)
-        {
-          if (TARGET_ARCH64)
-            return "srax\t%1, %2, %0";
-          operands[2] = GEN_INT (INTVAL (operands[2]) & 0x1f);
-        }
-    }
-  return "sra\t%1, %2, %0";
-}
+  {
+     if (GET_CODE (operands[2]) == CONST_INT)
+       operands[2] = GEN_INT (INTVAL (operands[2]) & 0x1f);
+     return "sra\t%1, %2, %0";
+  }
   [(set_attr "type" "shift")])
 
 (define_insn "*ashrsi3_extend"
@@ -7041,7 +7029,12 @@
        (ashiftrt:DI (match_operand:DI 1 "register_operand" "r")
                     (match_operand:SI 2 "arith_operand" "rI")))]
   "TARGET_ARCH64"
-  "srax\t%1, %2, %0"
+  
+  {
+    if (GET_CODE (operands[2]) == CONST_INT)
+      operands[2] = GEN_INT (INTVAL (operands[2]) & 0x3f);
+    return "srax\t%1, %2, %0";
+  }
   [(set_attr "type" "shift")])
 
 ;; XXX
@@ -7060,18 +7053,11 @@
        (lshiftrt:SI (match_operand:SI 1 "register_operand" "r")
                     (match_operand:SI 2 "arith_operand" "rI")))]
   ""
-{
-  if (GET_CODE (operands[2]) == CONST_INT)
-    {
-      if ((unsigned HOST_WIDE_INT) INTVAL (operands[2]) >= 32)
-        {
-          if (TARGET_ARCH64)
-            return "srlx\t%1, %2, %0";
-          operands[2] = GEN_INT (INTVAL (operands[2]) & 0x1f);
-        }
-    }
-  return "srl\t%1, %2, %0";
-}
+  {
+    if (GET_CODE (operands[2]) == CONST_INT)
+      operands[2] = GEN_INT (INTVAL (operands[2]) & 0x1f);
+    return "srl\t%1, %2, %0";
+  }
   [(set_attr "type" "shift")])
 
 ;; This handles the case where
@@ -7133,7 +7119,11 @@
        (lshiftrt:DI (match_operand:DI 1 "register_operand" "r")
                     (match_operand:SI 2 "arith_operand" "rI")))]
   "TARGET_ARCH64"
-  "srlx\t%1, %2, %0"
+  {
+    if (GET_CODE (operands[2]) == CONST_INT)
+      operands[2] = GEN_INT (INTVAL (operands[2]) & 0x3f);
+    return "srlx\t%1, %2, %0";
+  }
   [(set_attr "type" "shift")])
 
 ;; XXX



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