[src/netbsd-2]: src/sys/arch/mips Pull up following revision(s) (requested by...

[riz <riz%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/126d3827a5f0
branches:  netbsd-2
changeset: 564050:126d3827a5f0
user:      riz <riz%NetBSD.org@localhost>
date:      Tue Sep 13 21:26:33 2005 +0000

description:
Pull up following revision(s) (requested by tsutsui in ticket #5829):
        sys/arch/mips/include/locore.h: revision 1.69
        sys/arch/mips/mips/locore_mips3.S: revision 1.87
Add mips3_cp0_pg_mask_write() to initialize pagemask register.

diffstat:

 sys/arch/mips/include/locore.h    |   3 ++-
 sys/arch/mips/mips/locore_mips3.S |  16 +++++++++++++++-
 2 files changed, 17 insertions(+), 2 deletions(-)

diffs (47 lines):

diff -r 70c76fb68f7a -r 126d3827a5f0 sys/arch/mips/include/locore.h
--- a/sys/arch/mips/include/locore.h    Tue Sep 13 21:25:18 2005 +0000
+++ b/sys/arch/mips/include/locore.h    Tue Sep 13 21:26:33 2005 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.h,v 1.68 2004/02/13 11:36:15 wiz Exp $ */
+/* $NetBSD: locore.h,v 1.68.6.1 2005/09/13 21:26:33 riz Exp $ */
 
 /*
  * Copyright 1996 The Board of Trustees of The Leland Stanford
@@ -119,6 +119,7 @@
 
 uint32_t mips3_cp0_wired_read(void);
 void   mips3_cp0_wired_write(uint32_t);
+void   mips3_cp0_pg_mask_write(uint32_t);
 
 uint64_t mips3_ld(uint64_t *);
 void   mips3_sd(uint64_t *, uint64_t);
diff -r 70c76fb68f7a -r 126d3827a5f0 sys/arch/mips/mips/locore_mips3.S
--- a/sys/arch/mips/mips/locore_mips3.S Tue Sep 13 21:25:18 2005 +0000
+++ b/sys/arch/mips/mips/locore_mips3.S Tue Sep 13 21:26:33 2005 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: locore_mips3.S,v 1.86 2003/08/07 16:28:32 agc Exp $    */
+/*     $NetBSD: locore_mips3.S,v 1.86.6.1 2005/09/13 21:26:33 riz Exp $        */
 
 /*
  * Copyright (c) 1997 Jonathan Stone (hereinafter referred to as the author)
@@ -393,6 +393,20 @@
        nop
 END(mips3_cp0_wired_write)
 
+/*
+ * void mips3_cp0_pg_mask_write(u_int32_t)
+ *
+ *     Set the value of the CP0 PG_MASK register.
+ */
+LEAF(mips3_cp0_pg_mask_write)
+       mtc0    a0, MIPS_COP_0_TLB_PG_MASK
+       COP0_SYNC
+       nop
+       nop
+       j       ra
+       nop
+END(mips3_cp0_pg_mask_write)
+
 #if defined(_MIPS_BSD_API) && \
     (_MIPS_BSD_API == _MIPS_BSD_API_N32 || _MIPS_BSD_API == _MIPS_BSD_API_LP64)
 #error mips3_ld and mips3_sd should be adjusted for N32 or LP64