[src/trunk]: src/sys/arch/arm/s3c2xx0 Add some register definitions.

[mycroft <mycroft%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/0f2cc7ab9640
branches:  trunk
changeset: 551259:0f2cc7ab9640
user:      mycroft <mycroft%NetBSD.org@localhost>
date:      Wed Sep 03 03:11:50 2003 +0000

description:
Add some register definitions.

diffstat:

 sys/arch/arm/s3c2xx0/s3c2410reg.h |  12 ++++++++++--
 1 files changed, 10 insertions(+), 2 deletions(-)

diffs (33 lines):

diff -r a3a9bedf4368 -r 0f2cc7ab9640 sys/arch/arm/s3c2xx0/s3c2410reg.h
--- a/sys/arch/arm/s3c2xx0/s3c2410reg.h Wed Sep 03 02:07:07 2003 +0000
+++ b/sys/arch/arm/s3c2xx0/s3c2410reg.h Wed Sep 03 03:11:50 2003 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: s3c2410reg.h,v 1.3 2003/08/27 03:46:05 bsh Exp $ */
+/* $NetBSD: s3c2410reg.h,v 1.4 2003/09/03 03:11:50 mycroft Exp $ */
 
 /*
  * Copyright (c) 2003  Genetec corporation.  All rights reserved.
@@ -112,7 +112,11 @@
 #define S3C2410_INTCTL_SIZE    0x20
 
 
-/* Clock control: CLKCON register */
+/* Clock control */
+#define        CLKMAN_LOCKTIME 0x00
+#define        CLKMAN_MPLLCON  0x04
+#define        CLKMAN_UPLLCON  0x08
+#define        CLKMAN_CLKCON   0x0c
 #define         CLKCON_SPI     (1<<18)
 #define         CLKCON_IIS     (1<<17)
 #define         CLKCON_IIC     (1<<16)
@@ -130,6 +134,10 @@
 #define  CLKCON_NANDFC (1<<4)  /* PCLK to NAND Flash controller */
 #define  CLKCON_IDLE   (1<<2)  /* 1=transition to IDLE mode */
 #define  CLKCON_STOP   (1<<0)  /* 1=transition to STOP mode */
+#define        CLKMAN_CLKSLOW  0x10
+#define        CLKMAN_CLKDIVN  0x14
+#define         CLKDIVN_HDIVN  (1<<1)  /* hclk=fclk/2 */
+#define         CLKDIVN_PDIVN  (1<<0)  /* pclk=hclk/2 */
 
 /* NAND Flash controller */
 #define        NANDFC_NFCONF   0x00    /* Configuration */