[src/trunk]: src/gnu/dist/gcc/gcc/config/sparc Bring in a change from gcc-cur...

[martin <martin%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/c3068f3c3115
branches:  trunk
changeset: 566252:c3068f3c3115
user:      martin <martin%NetBSD.org@localhost>
date:      Sun May 02 11:00:06 2004 +0000

description:
Bring in a change from gcc-current to fix double -> unsigned long
conversions and generally avoid 128 bit (emulated) floats in between.
This fixes heaps of problems in perl >= 5.7.1, where integer values
and unsigned values are separated by the interpreter.

Thu Feb 26 18:40:40 2004 UTC by ebotcazou:
        * config/sparc/sparc-protos.h (sparc_emit_floatunsdi): Add 'mode'.
        (sparc_emit_fixunsdi): New prototype.
        * config/sparc/sparc.c (sparc_emit_floatunsdi): Use 'mode' argument.
        (sparc_emit_fixunsdi): New function.
        * config/sparc/sparc.md (floatunsdisf2): Use 'general_operand' for
        operand 1.  Pass SFmode to sparc_emit_floatunsdi.
        (floatunsdidf2): Use 'general_operand' for operand 1.  Pass DFmode
        to sparc_emit_floatunsdi.
        (fixuns_truncsfdi2): New expander.
        (fixuns_truncdfdi2): Likewise.

diffstat:

 gnu/dist/gcc/gcc/config/sparc/sparc-protos.h |   3 +-
 gnu/dist/gcc/gcc/config/sparc/sparc.c        |  46 +++++++++++++++++++++++++--
 gnu/dist/gcc/gcc/config/sparc/sparc.md       |  20 +++++++++--
 3 files changed, 60 insertions(+), 9 deletions(-)

diffs (134 lines):

diff -r eda5756bce11 -r c3068f3c3115 gnu/dist/gcc/gcc/config/sparc/sparc-protos.h
--- a/gnu/dist/gcc/gcc/config/sparc/sparc-protos.h      Sun May 02 08:16:52 2004 +0000
+++ b/gnu/dist/gcc/gcc/config/sparc/sparc-protos.h      Sun May 02 11:00:06 2004 +0000
@@ -73,7 +73,8 @@
 /* Define the function that build the compare insn for scc and bcc.  */
 extern rtx gen_compare_reg PARAMS ((enum rtx_code code, rtx, rtx));
 extern void sparc_emit_float_lib_cmp PARAMS ((rtx, rtx, enum rtx_code));
-extern void sparc_emit_floatunsdi PARAMS ((rtx [2]));
+extern void sparc_emit_floatunsdi (rtx [2], enum machine_mode);
+extern void sparc_emit_fixunsdi (rtx [2], enum machine_mode);
 extern void emit_tfmode_binop PARAMS ((enum rtx_code, rtx *));
 extern void emit_tfmode_unop PARAMS ((enum rtx_code, rtx *));
 extern void emit_tfmode_cvt PARAMS ((enum rtx_code, rtx *));
diff -r eda5756bce11 -r c3068f3c3115 gnu/dist/gcc/gcc/config/sparc/sparc.c
--- a/gnu/dist/gcc/gcc/config/sparc/sparc.c     Sun May 02 08:16:52 2004 +0000
+++ b/gnu/dist/gcc/gcc/config/sparc/sparc.c     Sun May 02 11:00:06 2004 +0000
@@ -5815,15 +5815,12 @@
    optabs would emit if we didn't have TFmode patterns.  */
 
 void
-sparc_emit_floatunsdi (operands)
-     rtx operands[2];
+sparc_emit_floatunsdi (rtx *operands, enum machine_mode mode)
 {
   rtx neglab, donelab, i0, i1, f0, in, out;
-  enum machine_mode mode;
 
   out = operands[0];
   in = force_reg (DImode, operands[1]);
-  mode = GET_MODE (out);
   neglab = gen_label_rtx ();
   donelab = gen_label_rtx ();
   i0 = gen_reg_rtx (DImode);
@@ -5847,6 +5844,47 @@
   emit_label (donelab);
 }
 
+/* Generate an FP to unsigned DImode conversion.  This is the same code
+   optabs would emit if we didn't have TFmode patterns.  */
+
+void
+sparc_emit_fixunsdi (rtx *operands, enum machine_mode mode)
+{
+  rtx neglab, donelab, i0, i1, f0, in, out, limit;
+
+  out = operands[0];
+  in = force_reg (mode, operands[1]);
+  neglab = gen_label_rtx ();
+  donelab = gen_label_rtx ();
+  i0 = gen_reg_rtx (DImode);
+  i1 = gen_reg_rtx (DImode);
+  limit = gen_reg_rtx (mode);
+  f0 = gen_reg_rtx (mode);
+
+  emit_move_insn (limit,
+                 CONST_DOUBLE_FROM_REAL_VALUE (
+                   REAL_VALUE_ATOF ("9223372036854775808.0", mode), mode));
+  emit_cmp_and_jump_insns (in, limit, GE, NULL_RTX, mode, 0, neglab);
+
+  emit_insn (gen_rtx_SET (VOIDmode,
+                         out,
+                         gen_rtx_FIX (DImode, gen_rtx_FIX (mode, in))));
+  emit_jump_insn (gen_jump (donelab));
+  emit_barrier ();
+
+  emit_label (neglab);
+
+  emit_insn (gen_rtx_SET (VOIDmode, f0, gen_rtx_MINUS (mode, in, limit)));
+  emit_insn (gen_rtx_SET (VOIDmode,
+                         i0,
+                         gen_rtx_FIX (DImode, gen_rtx_FIX (mode, f0))));
+  emit_insn (gen_movdi (i1, const1_rtx));
+  emit_insn (gen_ashldi3 (i1, i1, GEN_INT (63)));
+  emit_insn (gen_xordi3 (out, i0, i1));
+
+  emit_label (donelab);
+}
+
 /* Return the string to output a conditional branch to LABEL, testing
    register REG.  LABEL is the operand number of the label; REG is the
    operand number of the reg.  OP is the conditional expression.  The mode
diff -r eda5756bce11 -r c3068f3c3115 gnu/dist/gcc/gcc/config/sparc/sparc.md
--- a/gnu/dist/gcc/gcc/config/sparc/sparc.md    Sun May 02 08:16:52 2004 +0000
+++ b/gnu/dist/gcc/gcc/config/sparc/sparc.md    Sun May 02 11:00:06 2004 +0000
@@ -4637,9 +4637,9 @@
 
 (define_expand "floatunsdisf2"
   [(use (match_operand:SF 0 "register_operand" ""))
-   (use (match_operand:DI 1 "register_operand" ""))]
+   (use (match_operand:DI 1 "general_operand" ""))]
   "TARGET_ARCH64 && TARGET_FPU"
-  "sparc_emit_floatunsdi (operands); DONE;")
+  "sparc_emit_floatunsdi (operands, SFmode); DONE;")
 
 (define_insn "floatdidf2"
   [(set (match_operand:DF 0 "register_operand" "=e")
@@ -4651,9 +4651,9 @@
 
 (define_expand "floatunsdidf2"
   [(use (match_operand:DF 0 "register_operand" ""))
-   (use (match_operand:DI 1 "register_operand" ""))]
+   (use (match_operand:DI 1 "general_operand" ""))]
   "TARGET_ARCH64 && TARGET_FPU"
-  "sparc_emit_floatunsdi (operands); DONE;")
+  "sparc_emit_floatunsdi (operands, DFmode); DONE;")
 
 (define_expand "floatditf2"
   [(set (match_operand:TF 0 "nonimmediate_operand" "")
@@ -4722,6 +4722,12 @@
   [(set_attr "type" "fp")
    (set_attr "fptype" "double")])
 
+(define_expand "fixuns_truncsfdi2"
+  [(use (match_operand:DI 0 "register_operand" ""))
+   (use (match_operand:SF 1 "general_operand" ""))]
+  "TARGET_ARCH64 && TARGET_FPU"
+  "sparc_emit_fixunsdi (operands, SFmode); DONE;")
+
 (define_insn "fix_truncdfdi2"
   [(set (match_operand:DI 0 "register_operand" "=e")
        (fix:DI (fix:DF (match_operand:DF 1 "register_operand" "e"))))]
@@ -4730,6 +4736,12 @@
   [(set_attr "type" "fp")
    (set_attr "fptype" "double")])
 
+(define_expand "fixuns_truncdfdi2"
+  [(use (match_operand:DI 0 "register_operand" ""))
+   (use (match_operand:DF 1 "general_operand" ""))]
+  "TARGET_ARCH64 && TARGET_FPU"
+  "sparc_emit_fixunsdi (operands, DFmode); DONE;")
+
 (define_expand "fix_trunctfdi2"
   [(set (match_operand:DI 0 "register_operand" "")
        (fix:DI (match_operand:TF 1 "general_operand" "")))]