[src/trunk]: src/sys/arch/sgimips/hpc HPC1 seems to benefit from larger rings...

[rumble <rumble%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/4018989a63f9
branches:  trunk
changeset: 572300:4018989a63f9
user:      rumble <rumble%NetBSD.org@localhost>
date:      Wed Dec 29 06:28:14 2004 +0000

description:
HPC1 seems to benefit from larger rings. This should be especially
true on the transmit side, which appears to be significantly slower at
interrupting than HPC3.

XXX I used to be able to occasionally wedge the chip with
SQ_NTXDESC == 32, but have not yet been able to reproduce that
behaviour this evening with a larger value.

diffstat:

 sys/arch/sgimips/hpc/sqvar.h |  6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diffs (20 lines):

diff -r a0a5ed82ae27 -r 4018989a63f9 sys/arch/sgimips/hpc/sqvar.h
--- a/sys/arch/sgimips/hpc/sqvar.h      Wed Dec 29 04:47:44 2004 +0000
+++ b/sys/arch/sgimips/hpc/sqvar.h      Wed Dec 29 06:28:14 2004 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: sqvar.h,v 1.6 2004/12/29 02:11:31 rumble Exp $ */
+/*     $NetBSD: sqvar.h,v 1.7 2004/12/29 06:28:14 rumble Exp $ */
 
 /*
  * Copyright (c) 2001 Rafal K. Boni
@@ -43,8 +43,8 @@
 #include <sgimips/hpc/hpcreg.h>
 
 /* Note, these must be powers of two for the magic NEXT/PREV macros to work */
-#define SQ_NRXDESC             32
-#define SQ_NTXDESC             16
+#define SQ_NRXDESC             64
+#define SQ_NTXDESC             64
 
 #define        SQ_NRXDESC_MASK         (SQ_NRXDESC - 1)
 #define        SQ_NEXTRX(x)            ((x + 1) & SQ_NRXDESC_MASK)