[src/trunk]: src/sys/dev/pci Since the I/O and memory enable bits are written...

[dyoung <dyoung%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/51de662647c1
branches:  trunk
changeset: 541121:51de662647c1
user:      dyoung <dyoung%NetBSD.org@localhost>
date:      Thu Jan 02 06:26:49 2003 +0000

description:
Since the I/O and memory enable bits are written to the PCI CSR by
the PCI bus code, and because wi(4) does not use bus-mastering, we
may entirely skip writing the PCI CSR.

diffstat:

 sys/dev/pci/if_wi_pci.c |  11 ++---------
 1 files changed, 2 insertions(+), 9 deletions(-)

diffs (39 lines):

diff -r c26f276a703c -r 51de662647c1 sys/dev/pci/if_wi_pci.c
--- a/sys/dev/pci/if_wi_pci.c   Thu Jan 02 05:11:12 2003 +0000
+++ b/sys/dev/pci/if_wi_pci.c   Thu Jan 02 06:26:49 2003 +0000
@@ -1,4 +1,4 @@
-/*      $NetBSD: if_wi_pci.c,v 1.15 2003/01/01 02:36:54 dyoung Exp $  */
+/*      $NetBSD: if_wi_pci.c,v 1.16 2003/01/02 06:26:49 dyoung Exp $  */
 
 /*-
  * Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -43,7 +43,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_wi_pci.c,v 1.15 2003/01/01 02:36:54 dyoung Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_wi_pci.c,v 1.16 2003/01/02 06:26:49 dyoung Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -228,7 +228,6 @@
        pci_intr_handle_t ih;
        bus_space_tag_t memt, iot;
        bus_space_handle_t memh, ioh;
-       pcireg_t csr;
 
        psc->psc_pa = pa;
 
@@ -279,12 +278,6 @@
        sc->sc_enable = wi_pci_enable;
        sc->sc_disable = wi_pci_disable;
 
-       /* Enable the card. */
-       csr = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
-       csr |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE;
-       csr &= ~PCI_COMMAND_MASTER_ENABLE;
-       pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, csr);
-
        sc->sc_iot = iot;
        sc->sc_ioh = ioh;
        /* Make sure interrupts are disabled. */