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[src/trunk]: src/sys/dev/pci Bus_space-ify TGA register accesses.
details: https://anonhg.NetBSD.org/src/rev/a7751e55a2c4
branches: trunk
changeset: 483533:a7751e55a2c4
user: nathanw <nathanw%NetBSD.org@localhost>
date: Sun Mar 12 05:32:29 2000 +0000
description:
Bus_space-ify TGA register accesses.
(raster operations are still using pointer-based access)
diffstat:
sys/dev/pci/tga.c | 229 +++++++++++++++++++++++-------------------------
sys/dev/pci/tga_conf.c | 16 ++-
sys/dev/pci/tgareg.h | 4 +-
sys/dev/pci/tgavar.h | 38 +++++++-
4 files changed, 156 insertions(+), 131 deletions(-)
diffs (truncated from 606 to 300 lines):
diff -r 47e367b7ea32 -r a7751e55a2c4 sys/dev/pci/tga.c
--- a/sys/dev/pci/tga.c Sun Mar 12 05:23:07 2000 +0000
+++ b/sys/dev/pci/tga.c Sun Mar 12 05:32:29 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tga.c,v 1.20 2000/03/09 18:40:36 drochner Exp $ */
+/* $NetBSD: tga.c,v 1.21 2000/03/12 05:32:29 nathanw Exp $ */
/*
* Copyright (c) 1995, 1996 Carnegie-Mellon University.
@@ -66,7 +66,7 @@
sizeof(struct tga_softc), tgamatch, tgaattach,
};
-int tga_identify __P((tga_reg_t *));
+int tga_identify __P((struct tga_devconfig *));
const struct tga_conf *tga_getconf __P((int));
void tga_getdevconfig __P((bus_space_tag_t memt, pci_chipset_tag_t pc,
pcitag_t tag, struct tga_devconfig *dc));
@@ -176,7 +176,6 @@
int i, flags;
dc->dc_memt = memt;
- dc->dc_pc = pc;
dc->dc_pcitag = tag;
@@ -189,14 +188,17 @@
panic("tga memory not prefetchable");
if (bus_space_map(memt, dc->dc_pcipaddr, pcisize,
- BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR, &dc->dc_vaddr))
+ BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR, &dc->dc_memh))
return;
+ dc->dc_vaddr = dc->dc_memh; /* XXX Cheat-o-matic */
#ifdef __alpha__
dc->dc_paddr = ALPHA_K0SEG_TO_PHYS(dc->dc_vaddr); /* XXX */
#endif
- dc->dc_regs = (tga_reg_t *)(dc->dc_vaddr + TGA_MEM_CREGS);
- dc->dc_tga_type = tga_identify(dc->dc_regs);
+ bus_space_subregion(dc->dc_memt, dc->dc_memh,
+ TGA_MEM_CREGS, TGA_CREGS_SIZE,
+ &dc->dc_regs);
+ dc->dc_tga_type = tga_identify(dc);
tgac = dc->dc_tgaconf = tga_getconf(dc->dc_tga_type);
if (tgac == NULL)
@@ -208,7 +210,7 @@
panic("tga_getdevconfig: memory size mismatch?");
#endif
- switch (dc->dc_regs[TGA_REG_GREV] & 0xff) {
+ switch (TGARREG(dc, TGA_REG_GREV) & 0xff) {
case 0x01:
case 0x02:
case 0x03:
@@ -227,11 +229,11 @@
if (dc->dc_tga2) {
int monitor;
- monitor = (~dc->dc_regs[TGA_REG_GREV] >> 16) & 0x0f;
+ monitor = (~TGARREG(dc, TGA_REG_GREV) >> 16) & 0x0f;
tga2_init(dc, monitor);
}
- switch (dc->dc_regs[TGA_REG_VHCR] & 0x1ff) { /* XXX */
+ switch (TGARREG(dc, TGA_REG_VHCR) & 0x1ff) { /* XXX */
case 0:
dc->dc_wid = 8192;
break;
@@ -241,29 +243,29 @@
break;
default:
- dc->dc_wid = (dc->dc_regs[TGA_REG_VHCR] & 0x1ff) * 4; /* XXX */
+ dc->dc_wid = (TGARREG(dc, TGA_REG_VHCR) & 0x1ff) * 4; /* XXX */
break;
}
dc->dc_rowbytes = dc->dc_wid * (dc->dc_tgaconf->tgac_phys_depth / 8);
- if ((dc->dc_regs[TGA_REG_VHCR] & 0x00000001) != 0 && /* XXX */
- (dc->dc_regs[TGA_REG_VHCR] & 0x80000000) != 0) { /* XXX */
+ if ((TGARREG(dc, TGA_REG_VHCR) & 0x00000001) != 0 && /* XXX */
+ (TGARREG(dc, TGA_REG_VHCR) & 0x80000000) != 0) { /* XXX */
dc->dc_wid -= 4;
/*
* XXX XXX turning off 'odd' shouldn't be necesssary,
* XXX XXX but i can't make X work with the weird size.
*/
- dc->dc_regs[TGA_REG_VHCR] &= ~0x80000001;
+ TGAWREG(dc, TGA_REG_VHCR, TGARREG(dc, TGA_REG_VHCR) & ~0x80000001);
dc->dc_rowbytes =
dc->dc_wid * (dc->dc_tgaconf->tgac_phys_depth / 8);
}
- dc->dc_ht = (dc->dc_regs[TGA_REG_VVCR] & 0x7ff); /* XXX */
+ dc->dc_ht = (TGARREG(dc, TGA_REG_VVCR) & 0x7ff); /* XXX */
/* XXX this seems to be what DEC does */
- dc->dc_regs[TGA_REG_CCBR] = 0;
- dc->dc_regs[TGA_REG_VVBR] = 1;
+ TGAWREG(dc, TGA_REG_CCBR, 0);
+ TGAWREG(dc, TGA_REG_VVBR, 1);
dc->dc_videobase = dc->dc_vaddr + tgac->tgac_dbuf[0] +
1 * tgac->tgac_vvbr_units;
dc->dc_blanked = 1;
@@ -274,7 +276,7 @@
* It seems that the console firmware clears some of them
* under some circumstances, which causes cute vertical stripes.
*/
- dc->dc_regs[TGA_REG_GPXR_P] = 0xffffffff;
+ TGAWREG(dc, TGA_REG_GPXR_P, 0xffffffff);
/* clear the screen */
for (i = 0; i < dc->dc_ht * dc->dc_rowbytes; i += sizeof(u_int32_t))
@@ -393,7 +395,7 @@
* cursor, setting a sane colormap, etc.
*/
(*sc->sc_dc->dc_ramdac_funcs->ramdac_init)(sc->sc_dc->dc_ramdac_cookie);
- sc->sc_dc->dc_regs[TGA_REG_SISR] = 0x00000001; /* XXX */
+ TGAWREG(sc->sc_dc, TGA_REG_SISR, 0x00000001); /* XXX */
if (sc->sc_dc->dc_tgaconf == NULL) {
printf("unknown board configuration\n");
@@ -494,7 +496,7 @@
{
struct tga_devconfig *dc = v;
- dc->dc_regs[TGA_REG_SISR] = 0x00010000;
+ TGAWREG(dc, TGA_REG_SISR, 0x00010000);
dc->dc_ramdac_intr = f;
return 0;
}
@@ -506,11 +508,11 @@
struct tga_devconfig *dc = v;
struct ramdac_cookie *dcrc= dc->dc_ramdac_cookie;
- if ((dc->dc_regs[TGA_REG_SISR] & 0x00010001) != 0x00010001)
+ if ((TGARREG(dc, TGA_REG_SISR) & 0x00010001) != 0x00010001)
return 0;
dc->dc_ramdac_intr(dcrc);
dc->dc_ramdac_intr = NULL;
- dc->dc_regs[TGA_REG_SISR] = 0x00000001;
+ TGAWREG(dc, TGA_REG_SISR, 0x00000001);
return (1);
}
@@ -636,7 +638,8 @@
if (!dc->dc_blanked) {
dc->dc_blanked = 1;
- dc->dc_regs[TGA_REG_VVVR] |= VVR_BLANK; /* XXX */
+ /* XXX */
+ TGAWREG(dc, TGA_REG_VVVR, TGARREG(dc, TGA_REG_VVVR) | VVR_BLANK);
}
}
@@ -647,7 +650,8 @@
if (dc->dc_blanked) {
dc->dc_blanked = 0;
- dc->dc_regs[TGA_REG_VVVR] &= ~VVR_BLANK; /* XXX */
+ /* XXX */
+ TGAWREG(dc, TGA_REG_VVVR, TGARREG(dc, TGA_REG_VVVR) & ~VVR_BLANK);
}
}
@@ -684,13 +688,15 @@
/* parameters are OK; do it */
if (v & WSDISPLAY_CURSOR_DOCUR) {
if (cursorp->enable)
- dc->dc_regs[TGA_REG_VVVR] |= 0x04; /* XXX */
+ /* XXX */
+ TGAWREG(dc, TGA_REG_VVVR, TGARREG(dc, TGA_REG_VVVR) | 0x04);
else
- dc->dc_regs[TGA_REG_VVVR] &= ~0x04; /* XXX */
+ /* XXX */
+ TGAWREG(dc, TGA_REG_VVVR, TGARREG(dc, TGA_REG_VVVR) & ~0x04);
}
if (v & WSDISPLAY_CURSOR_DOPOS) {
- dc->dc_regs[TGA_REG_CXYR] = ((cursorp->pos.y & 0xfff) << 12) |
- (cursorp->pos.x & 0xfff);
+ TGAWREG(dc, TGA_REG_CXYR,
+ ((cursorp->pos.y & 0xfff) << 12) | (cursorp->pos.x & 0xfff));
}
if (v & WSDISPLAY_CURSOR_DOCMAP) {
/* can't fail. */
@@ -698,11 +704,10 @@
}
if (v & WSDISPLAY_CURSOR_DOSHAPE) {
count = ((64 * 2) / NBBY) * cursorp->size.y;
- dc->dc_regs[TGA_REG_CCBR] =
- (dc->dc_regs[TGA_REG_CCBR] & ~0xfc00) |
- (cursorp->size.y << 10);
+ TGAWREG(dc, TGA_REG_CCBR,
+ (TGARREG(dc, TGA_REG_CCBR) & ~0xfc00) | (cursorp->size.y << 10));
copyin(cursorp->image, (char *)(dc->dc_vaddr +
- (dc->dc_regs[TGA_REG_CCBR] & 0x3ff)),
+ (TGARREG(dc, TGA_REG_CCBR) & 0x3ff)),
count); /* can't fail. */
}
return (0);
@@ -719,16 +724,16 @@
cursorp->which = WSDISPLAY_CURSOR_DOALL &
~(WSDISPLAY_CURSOR_DOHOT | WSDISPLAY_CURSOR_DOCMAP);
- cursorp->enable = (dc->dc_regs[TGA_REG_VVVR] & 0x04) != 0;
- cursorp->pos.x = dc->dc_regs[TGA_REG_CXYR] & 0xfff;
- cursorp->pos.y = (dc->dc_regs[TGA_REG_CXYR] >> 12) & 0xfff;
+ cursorp->enable = (TGARREG(dc, TGA_REG_VVVR) & 0x04) != 0;
+ cursorp->pos.x = TGARREG(dc, TGA_REG_CXYR) & 0xfff;
+ cursorp->pos.y = (TGARREG(dc, TGA_REG_CXYR) >> 12) & 0xfff;
cursorp->size.x = 64;
- cursorp->size.y = (dc->dc_regs[TGA_REG_CCBR] >> 10) & 0x3f;
+ cursorp->size.y = (TGARREG(dc, TGA_REG_CCBR) >> 10) & 0x3f;
if (cursorp->image != NULL) {
count = (cursorp->size.y * 64 * 2) / NBBY;
error = copyout((char *)(dc->dc_vaddr +
- (dc->dc_regs[TGA_REG_CCBR] & 0x3ff)),
+ (TGARREG(dc, TGA_REG_CCBR) & 0x3ff)),
cursorp->image, count);
if (error)
return (error);
@@ -744,8 +749,8 @@
struct wsdisplay_curpos *curposp;
{
- dc->dc_regs[TGA_REG_CXYR] =
- ((curposp->y & 0xfff) << 12) | (curposp->x & 0xfff);
+ TGAWREG(dc, TGA_REG_CXYR,
+ ((curposp->y & 0xfff) << 12) | (curposp->x & 0xfff));
return (0);
}
@@ -755,8 +760,8 @@
struct wsdisplay_curpos *curposp;
{
- curposp->x = dc->dc_regs[TGA_REG_CXYR] & 0xfff;
- curposp->y = (dc->dc_regs[TGA_REG_CXYR] >> 12) & 0xfff;
+ curposp->x = TGARREG(dc, TGA_REG_CXYR) & 0xfff;
+ curposp->y = (TGARREG(dc, TGA_REG_CXYR) >> 12) & 0xfff;
return (0);
}
@@ -921,10 +926,6 @@
int sx, sy;
{
struct tga_devconfig *dc = (struct tga_devconfig *)dst->data;
- tga_reg_t *regs0 = dc->dc_regs;
- tga_reg_t *regs1 = regs0 + 16 * 1024; /* register alias 1 */
- tga_reg_t *regs2 = regs1 + 16 * 1024; /* register alias 2 */
- tga_reg_t *regs3 = regs2 + 16 * 1024; /* register alias 3 */
int srcb, dstb;
int x, y;
int xstart, xend, xdir, xinc;
@@ -962,22 +963,28 @@
yend *= dst->linelongs * 4;
srcb = offset + sy * src->linelongs * 4 + sx;
dstb = offset + dy * dst->linelongs * 4 + dx;
- regs3[TGA_REG_GMOR] = 0x0007; /* Copy mode */
- regs3[TGA_REG_GOPR] = map_rop[rop]; /* Set up the op */
+ TGAWALREG(dc, TGA_REG_GMOR, 3, 0x0007); /* Copy mode */
+ TGAWALREG(dc, TGA_REG_GOPR, 3, map_rop[rop]); /* Set up the op */
for (y = ystart; (ydir * y) < (ydir * yend); y += yinc) {
for (x = xstart; (xdir * x) < (xdir * xend); x += xinc) {
- regs0[TGA_REG_GCSR] = srcb + y + x + 3 * 64;
- regs0[TGA_REG_GCDR] = dstb + y + x + 3 * 64;
- regs1[TGA_REG_GCSR] = srcb + y + x + 2 * 64;
- regs1[TGA_REG_GCDR] = dstb + y + x + 2 * 64;
- regs2[TGA_REG_GCSR] = srcb + y + x + 1 * 64;
- regs2[TGA_REG_GCDR] = dstb + y + x + 1 * 64;
- regs3[TGA_REG_GCSR] = srcb + y + x + 0 * 64;
- regs3[TGA_REG_GCDR] = dstb + y + x + 0 * 64;
+ /* XXX XXX Eight writes to different addresses should fill
+ * XXX XXX up the write buffers on 21064 and 21164 chips,
+ * XXX XXX but later CPUs might have larger write buffers which
+ * XXX XXX require further unrolling of this loop, or the
+ * XXX XXX insertion of memory barriers.
+ */
+ TGAWALREG(dc, TGA_REG_GCSR, 0, srcb + y + x + 3 * 64);
+ TGAWALREG(dc, TGA_REG_GCDR, 0, dstb + y + x + 3 * 64);
+ TGAWALREG(dc, TGA_REG_GCSR, 1, srcb + y + x + 2 * 64);
+ TGAWALREG(dc, TGA_REG_GCDR, 1, dstb + y + x + 2 * 64);
+ TGAWALREG(dc, TGA_REG_GCSR, 2, srcb + y + x + 1 * 64);
+ TGAWALREG(dc, TGA_REG_GCDR, 2, dstb + y + x + 1 * 64);
+ TGAWALREG(dc, TGA_REG_GCSR, 3, srcb + y + x + 0 * 64);
+ TGAWALREG(dc, TGA_REG_GCDR, 3, dstb + y + x + 0 * 64);
}
}
- regs0[TGA_REG_GOPR] = 0x0003; /* op -> dst = src */
- regs0[TGA_REG_GMOR] = 0x0000; /* Simple mode */
+ TGAWALREG(dc, TGA_REG_GOPR, 0, 0x0003); /* op -> dst = src */
+ TGAWALREG(dc, TGA_REG_GMOR, 0, 0x0000); /* Simple mode */
return 0;
}
@@ -988,15 +995,12 @@
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