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[src/nathanw_sa]: src/sys/arch/mvme68k Ditch the `simulated' software interru...
details: https://anonhg.NetBSD.org/src/rev/2c2a206aa406
branches: nathanw_sa
changeset: 504817:2c2a206aa406
user: scw <scw%NetBSD.org@localhost>
date: Fri Jul 06 19:00:15 2001 +0000
description:
Ditch the `simulated' software interrupt in favour of
hardware-assisted soft interrupts on all boards.
(Note: VMEChip2-less 162/172 not yet tested)
This greatly simplifies the `rei' path and allows
interrupt nesting to be tracked somewhat more easily.
As a result we now have a working CLKF_INTR() macro
and can detect uvm_fault() being called from an interrupt
(although there may still be a very short race detecting
the latter; need to investigate further).
diffstat:
sys/arch/mvme68k/include/intr.h | 138 +++++++++++++++++++++++
sys/arch/mvme68k/mvme68k/softintr.c | 210 ++++++++++++++++++++++++++++++++++++
2 files changed, 348 insertions(+), 0 deletions(-)
diffs (truncated from 356 to 300 lines):
diff -r 52295adf41af -r 2c2a206aa406 sys/arch/mvme68k/include/intr.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/mvme68k/include/intr.h Fri Jul 06 19:00:15 2001 +0000
@@ -0,0 +1,138 @@
+/* $NetBSD: intr.h,v 1.11.8.2 2001/07/06 19:00:15 scw Exp $ */
+
+/*-
+ * Copyright (c) 2000 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe and Steve C. Woodford.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the NetBSD
+ * Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _MVME68K_INTR_H
+#define _MVME68K_INTR_H
+
+#include <sys/device.h>
+#include <sys/queue.h>
+#include <machine/psl.h>
+
+/*
+ * These are identical to the values used by hp300, but are not meaningful
+ * to mvme68k code at this time.
+ */
+#define IPL_NONE 0 /* disable only this interrupt */
+#define IPL_BIO 1 /* disable block I/O interrupts */
+#define IPL_NET 2 /* disable network interrupts */
+#define IPL_TTY 3 /* disable terminal interrupts */
+#define IPL_TTYNOBUF 4 /* IPL_TTY + higher ISR priority */
+#define IPL_SERIAL 4 /* disable serial interrupts */
+#define IPL_CLOCK 5 /* disable clock interrupts */
+#define IPL_HIGH 6 /* disable all interrupts */
+
+/* Copied from alpha/include/intr.h */
+#define IPL_SOFTSERIAL 0 /* serial software interrupts */
+#define IPL_SOFTNET 1 /* network software interrupts */
+#define IPL_SOFTCLOCK 2 /* clock software interrupts */
+#define IPL_SOFT 3 /* other software interrupts */
+#define IPL_NSOFT 4
+
+#define IPL_SOFTNAMES { \
+ "serial", \
+ "net", \
+ "clock", \
+ "misc", \
+}
+
+#ifdef _KERNEL
+#define spl0() _spl0()
+#define spllowersoftclock() spl1()
+#define splsoft() splraise1()
+#define splsoftclock() splsoft()
+#define splsoftnet() splsoft()
+#define splsoftserial() splsoft()
+#define splbio() splraise2()
+#define splnet() splraise3()
+#define spltty() splraise3()
+#define splvm() splraise3()
+#define splserial() splraise4()
+#define splclock() splraise5()
+#define splstatclock() splraise5()
+#define splhigh() spl7()
+#define splsched() spl7()
+#define spllock() spl7()
+
+#ifndef _LOCORE
+
+static __inline void
+splx(int sr)
+{
+
+ __asm __volatile("movw %0,%%sr" : : "di" (sr));
+}
+
+#define setsoft(x) x = 0
+
+struct mvme68k_soft_intrhand {
+ LIST_ENTRY(mvme68k_soft_intrhand) sih_q;
+ struct mvme68k_soft_intr *sih_intrhead;
+ void (*sih_fn)(void *);
+ void *sih_arg;
+ volatile int sih_pending;
+};
+
+struct mvme68k_soft_intr {
+ LIST_HEAD(, mvme68k_soft_intrhand) msi_q;
+ struct evcnt msi_evcnt;
+ volatile unsigned char msi_ssir;
+};
+
+void *softintr_establish(int, void (*)(void *), void *);
+void softintr_disestablish(void *);
+void softintr_init(void);
+void softintr_dispatch(void);
+extern void (*_softintr_chipset_assert)(void);
+
+#define softintr_schedule(arg) \
+ do { \
+ struct mvme68k_soft_intrhand *__sih = (arg); \
+ __sih->sih_pending = 1; \
+ setsoft(__sih->sih_intrhead->msi_ssir); \
+ _softintr_chipset_assert(); \
+ } while (0)
+
+/* XXX For legacy software interrupts */
+extern struct mvme68k_soft_intrhand *softnet_intrhand;
+
+#define setsoftnet() softintr_schedule(softnet_intrhand)
+
+#endif /* !_LOCORE */
+#endif /* _KERNEL */
+
+#endif /* _MVME68K_INTR_H */
diff -r 52295adf41af -r 2c2a206aa406 sys/arch/mvme68k/mvme68k/softintr.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/mvme68k/mvme68k/softintr.c Fri Jul 06 19:00:15 2001 +0000
@@ -0,0 +1,210 @@
+/* $NetBSD: softintr.c,v 1.5.8.2 2001/07/06 19:00:15 scw Exp $ */
+
+/*-
+ * Copyright (c) 2000 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Steve C. Woodford and Jason R. Thorpe.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the NetBSD
+ * Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Generic soft interrupt implementation for mvme68k.
+ * Based heavily on the alpha implementation by Jason Thorpe.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/proc.h>
+#include <sys/malloc.h>
+#include <sys/sched.h>
+#include <sys/vmmeter.h>
+
+#include <uvm/uvm_extern.h>
+
+#include <machine/cpu.h>
+#include <machine/intr.h>
+
+#include <mvme68k/mvme68k/isr.h>
+
+
+void (*_softintr_chipset_assert)(void);
+struct mvme68k_soft_intrhand *softnet_intrhand;
+
+static struct mvme68k_soft_intr mvme68k_soft_intrs[IPL_NSOFT];
+
+#ifdef DEBUG
+static void dummy_softintr_assert(void);
+#endif
+
+static __inline int
+ssir_pending(volatile unsigned char *ssptr)
+{
+ int __rv;
+
+ __asm __volatile(
+ " moveq #0, %0 \n"
+ " tas %1 \n"
+ " jne 1f \n"
+ " moveq #1, %0 \n"
+ "1: \n"
+ : "=d" (__rv)
+ : "m" (*ssptr));
+
+ return (__rv);
+}
+
+#ifdef DEBUG
+static void
+dummy_softintr_assert(void)
+{
+
+ panic("softintr_schedule: Called before soft interrupts configured!");
+ /* NOTREACHED */
+}
+#endif
+
+/*
+ * softintr_init()
+ *
+ * Initialise mvme68k software interrupt subsystem.
+ */
+void
+softintr_init()
+{
+ static const char *softintr_names[] = IPL_SOFTNAMES;
+ struct mvme68k_soft_intr *msi;
+ int i;
+
+#ifdef DEBUG
+ _softintr_chipset_assert = dummy_softintr_assert;
+#endif
+
+ for (i = 0; i < IPL_NSOFT; i++) {
+ msi = &mvme68k_soft_intrs[i];
+ LIST_INIT(&msi->msi_q);
+ msi->msi_ssir = 1;
+ evcnt_attach_dynamic(&msi->msi_evcnt, EVCNT_TYPE_INTR,
+ NULL, "soft", softintr_names[i]);
+ }
+
+ /* Establish legacy software interrupt handlers */
+ softnet_intrhand = softintr_establish(IPL_SOFTNET,
+ (void (*)(void *)) netintr, NULL);
+
+#ifdef DEBUG
+ assert(softnet_intrhand != NULL);
+#endif
+}
+
+/*
+ * softintr_dispatch()
+ *
+ * Internal function for running queued soft interrupts.
+ */
+void
+softintr_dispatch()
+{
+ struct mvme68k_soft_intr *msi;
+ struct mvme68k_soft_intrhand *sih;
+ int handled;
+
+ do {
+ for (msi = mvme68k_soft_intrs, handled = 0;
+ msi < &mvme68k_soft_intrs[IPL_NSOFT];
+ msi++) {
+
+ if (ssir_pending(&msi->msi_ssir) == 0)
+ continue;
+
+ msi->msi_evcnt.ev_count++;
+ handled++;
+
+ for (sih = LIST_FIRST(&msi->msi_q);
+ sih != NULL;
+ sih = LIST_NEXT(sih, sih_q)) {
+ if (sih->sih_pending) {
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