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[src/trunk]: src/sys/arch/mvme68k/dev Pass the requested cpu irq priority thr...
details: https://anonhg.NetBSD.org/src/rev/45e4b209a019
branches: trunk
changeset: 497116:45e4b209a019
user: scw <scw%NetBSD.org@localhost>
date: Tue Sep 19 19:35:52 2000 +0000
description:
Pass the requested cpu irq priority through to the VME chipset-specific
backend.
The VME2chip can use this to translate a VMEbus irq to a cpu irq.
The VMEchip (on mvme147) can't deal with the VMEbus irq and cpu irq
being different so we just panic in that case for now.
diffstat:
sys/arch/mvme68k/dev/mvmebus.c | 17 +++++++++++-
sys/arch/mvme68k/dev/mvmebus.h | 4 +-
sys/arch/mvme68k/dev/vme_pcc.c | 14 +++++++---
sys/arch/mvme68k/dev/vme_two.c | 54 ++++++++++++++++++++++++++---------------
4 files changed, 60 insertions(+), 29 deletions(-)
diffs (229 lines):
diff -r c07c5ebece86 -r 45e4b209a019 sys/arch/mvme68k/dev/mvmebus.c
--- a/sys/arch/mvme68k/dev/mvmebus.c Tue Sep 19 19:31:34 2000 +0000
+++ b/sys/arch/mvme68k/dev/mvmebus.c Tue Sep 19 19:35:52 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mvmebus.c,v 1.4 2000/08/21 20:50:13 scw Exp $ */
+/* $NetBSD: mvmebus.c,v 1.5 2000/09/19 19:35:52 scw Exp $ */
/*-
* Copyright (c) 2000 The NetBSD Foundation, Inc.
@@ -115,6 +115,18 @@
* visible through. This will tell us the address
* modifier and datasizes it uses, as well as allowing
* us to calculate its `real' VMEbus address.
+ *
+ * XXX FIXME: This is broken if the RAM is mapped through
+ * a translated address space. For example, on mvme167 it's
+ * perfectly legal to set up the following A32 mapping:
+ *
+ * vr_locaddr == 0x80000000
+ * vr_vmestart == 0x10000000
+ * vr_vmeend == 0x10ffffff
+ *
+ * In this case, RAM at VMEbus address 0x10800000 will appear at local
+ * address 0x80800000, but we need to set the slave vr_vmestart to
+ * 0x10800000.
*/
for (i = 0, mvr = sc->sc_masters; i < sc->sc_nmasters; i++, mvr++) {
vme_addr_t vstart = mvr->vr_locstart + mvr->vr_vmestart;
@@ -403,7 +415,8 @@
first = (sc->sc_irqref[level]++ == 0);
- (*sc->sc_intr_establish)(sc->sc_chip, level, vector, first, func, arg);
+ (*sc->sc_intr_establish)(sc->sc_chip, prior, level, vector, first,
+ func, arg);
return ((void *) handle);
}
diff -r c07c5ebece86 -r 45e4b209a019 sys/arch/mvme68k/dev/mvmebus.h
--- a/sys/arch/mvme68k/dev/mvmebus.h Tue Sep 19 19:31:34 2000 +0000
+++ b/sys/arch/mvme68k/dev/mvmebus.h Tue Sep 19 19:35:52 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mvmebus.h,v 1.3 2000/08/20 21:51:31 scw Exp $ */
+/* $NetBSD: mvmebus.h,v 1.4 2000/09/19 19:35:53 scw Exp $ */
/*-
* Copyright (c) 2000 The NetBSD Foundation, Inc.
@@ -106,7 +106,7 @@
struct mvmebus_range *sc_masters;
int sc_nslaves;
struct mvmebus_range *sc_slaves;
- void (*sc_intr_establish)(void *, int, int, int,
+ void (*sc_intr_establish)(void *, int, int, int, int,
int (*)(void *), void *);
void (*sc_intr_disestablish)(void *, int, int, int);
struct vme_chipset_tag sc_vct;
diff -r c07c5ebece86 -r 45e4b209a019 sys/arch/mvme68k/dev/vme_pcc.c
--- a/sys/arch/mvme68k/dev/vme_pcc.c Tue Sep 19 19:31:34 2000 +0000
+++ b/sys/arch/mvme68k/dev/vme_pcc.c Tue Sep 19 19:35:52 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: vme_pcc.c,v 1.11 2000/08/20 21:51:31 scw Exp $ */
+/* $NetBSD: vme_pcc.c,v 1.12 2000/09/19 19:35:53 scw Exp $ */
/*-
* Copyright (c) 1996-2000 The NetBSD Foundation, Inc.
@@ -78,7 +78,8 @@
extern phys_ram_seg_t mem_clusters[];
static int vme_pcc_attached;
-void vme_pcc_intr_establish(void *, int, int, int, int (*)(void *), void *);
+void vme_pcc_intr_establish(void *, int, int, int, int,
+ int (*)(void *), void *);
void vme_pcc_intr_disestablish(void *, int, int, int);
@@ -253,15 +254,18 @@
}
void
-vme_pcc_intr_establish(csc, level, vector, first, func, arg)
+vme_pcc_intr_establish(csc, prior, level, vector, first, func, arg)
void *csc;
- int level, vector, first;
+ int prior, level, vector, first;
int (*func)(void *);
void *arg;
{
struct vme_pcc_softc *sc = csc;
- isrlink_vectored(func, arg, level, vector);
+ if (prior != level)
+ panic("vme_pcc_intr_establish: cpu priority != VMEbus irq level");
+
+ isrlink_vectored(func, arg, prior, vector);
if (first) {
/*
diff -r c07c5ebece86 -r 45e4b209a019 sys/arch/mvme68k/dev/vme_two.c
--- a/sys/arch/mvme68k/dev/vme_two.c Tue Sep 19 19:31:34 2000 +0000
+++ b/sys/arch/mvme68k/dev/vme_two.c Tue Sep 19 19:35:52 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: vme_two.c,v 1.9 2000/09/06 19:51:44 scw Exp $ */
+/* $NetBSD: vme_two.c,v 1.10 2000/09/19 19:35:53 scw Exp $ */
/*-
* Copyright (c) 1999 The NetBSD Foundation, Inc.
@@ -37,7 +37,7 @@
*/
/*
- * VME support specific to the VMEchip2 found on the MVME-1[67]7 boards.
+ * VME support specific to the VMEchip2 found on the MVME-1[67][27] boards.
*/
#include <sys/param.h>
@@ -92,7 +92,7 @@
void vmetwo_slave_range __P((struct vmetwo_softc *, int, vme_am_t,
struct mvmebus_range *));
int vmetwo_local_isr_trampoline __P((void *));
-void vmetwo_intr_establish __P((void *, int, int, int,
+void vmetwo_intr_establish __P((void *, int, int, int, int,
int (*)(void *), void *));
void vmetwo_intr_disestablish __P((void *, int, int, int));
@@ -279,7 +279,8 @@
* Let the NMI handler deal with level 7 ABORT switch
* interrupts
*/
- vmetwo_intr_establish(sc, 7, VME2_VEC_ABORT, 1, nmihand, NULL);
+ vmetwo_intr_establish(sc, 7, 7, VME2_VEC_ABORT, 1,
+ nmihand, NULL);
}
/* Attach to the mvme68k common VMEbus front-end */
@@ -362,29 +363,28 @@
/*
* Local->VMEbus map '4' has optional translation bits, so
* the VMEbus start and end addresses may need to be adjusted.
- *
- * Note that if the translation register is zero, translation
- * is not enabled. This code works either way.
*/
- if (range == 3) {
+ if (range == 3 && (reg = vme2_lcsr_read(sc, VME2LCSR_MAST4_TRANS))!=0) {
+ uint32_t addr, sel, len = end - start;
+
vr->vr_locstart = start;
reg = vme2_lcsr_read(sc, VME2LCSR_MAST4_TRANS);
reg &= VME2_MAST4_TRANS_SELECT_MASK;
- reg <<= VME2_MAST4_TRANS_SELECT_SHIFT;
- vr->vr_mask &= ~reg;
- start &= ~reg;
- end &= ~reg;
+ sel = reg << VME2_MAST4_TRANS_SELECT_SHIFT;
reg = vme2_lcsr_read(sc, VME2LCSR_MAST4_TRANS);
reg &= VME2_MAST4_TRANS_ADDRESS_MASK;
- reg <<= VME2_MAST4_TRANS_ADDRESS_SHIFT;
- start |= reg;
- end |= reg;
+ addr = reg << VME2_MAST4_TRANS_ADDRESS_SHIFT;
+
+ start = (addr & sel) | (start & (~sel));
+ end = start + len;
+ vr->vr_mask &= len - 1;
} else
vr->vr_locstart = 0;
/* XXX Deal with overlap of onboard RAM address space */
+ /* XXX Then again, 167-Bug warns about this at setup time ... */
/*
* Fixup the addresses this range corresponds to
@@ -505,9 +505,9 @@
}
void
-vmetwo_intr_establish(csc, lvl, vec, first, hand, arg)
+vmetwo_intr_establish(csc, prior, lvl, vec, first, hand, arg)
void *csc;
- int lvl, vec, first;
+ int prior, lvl, vec, first;
int (*hand)(void *);
void *arg;
{
@@ -547,7 +547,7 @@
}
/* Hook the interrupt */
- isrlink_vectored(hand, arg, lvl, vec);
+ isrlink_vectored(hand, arg, prior, vec);
/*
* Do we need to tell the VMEChip2 to let the interrupt through?
@@ -559,10 +559,10 @@
VME2LCSR_INTERRUPT_LEVEL_BASE;
ilshift = VME2_ILSHIFT_FROM_VECTOR(bitoff);
- /* Program the specified interrupt to signal at 'lvl' */
+ /* Program the specified interrupt to signal at 'prior' */
reg = vme2_lcsr_read(sc, iloffset);
reg &= ~(VME2_INTERRUPT_LEVEL_MASK << ilshift);
- reg |= (lvl << ilshift);
+ reg |= (prior << ilshift);
vme2_lcsr_write(sc, iloffset, reg);
/* Clear it */
@@ -574,6 +574,20 @@
reg |= VME2_LOCAL_INTERRUPT(bitoff);
vme2_lcsr_write(sc, VME2LCSR_LOCAL_INTERRUPT_ENABLE, reg);
}
+#ifdef DIAGNOSTIC
+ else {
+ /* Verify the interrupt priority is the same */
+ iloffset = VME2_ILOFFSET_FROM_VECTOR(bitoff) +
+ VME2LCSR_INTERRUPT_LEVEL_BASE;
+ ilshift = VME2_ILSHIFT_FROM_VECTOR(bitoff);
+
+ reg = vme2_lcsr_read(sc, iloffset);
+ reg &= (VME2_INTERRUPT_LEVEL_MASK << ilshift);
+
+ if ((prior << ilshift) != reg)
+ panic("vmetwo_intr_establish: priority mismatch!");
+ }
+#endif
splx(s);
}
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