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[src/trunk]: src/sys/arch/arm/xscale add comment and delete unused definition
details: https://anonhg.NetBSD.org/src/rev/61be791c3e4a
branches: trunk
changeset: 552409:61be791c3e4a
user: ichiro <ichiro%NetBSD.org@localhost>
date: Thu Sep 25 14:48:16 2003 +0000
description:
add comment and delete unused definition
diffstat:
sys/arch/arm/xscale/ixp425_pci_space.c | 7 +++++--
sys/arch/arm/xscale/ixp425reg.h | 4 +---
2 files changed, 6 insertions(+), 5 deletions(-)
diffs (46 lines):
diff -r 481244b3f73d -r 61be791c3e4a sys/arch/arm/xscale/ixp425_pci_space.c
--- a/sys/arch/arm/xscale/ixp425_pci_space.c Thu Sep 25 14:17:57 2003 +0000
+++ b/sys/arch/arm/xscale/ixp425_pci_space.c Thu Sep 25 14:48:16 2003 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ixp425_pci_space.c,v 1.1 2003/09/25 14:11:18 ichiro Exp $ */
+/* $NetBSD: ixp425_pci_space.c,v 1.2 2003/09/25 14:48:16 ichiro Exp $ */
/*
* Copyright (c) 2003
@@ -34,7 +34,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ixp425_pci_space.c,v 1.1 2003/09/25 14:11:18 ichiro Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ixp425_pci_space.c,v 1.2 2003/09/25 14:48:16 ichiro Exp $");
/*
* bus_space PCI functions for ixp425
@@ -165,6 +165,9 @@
bs->bs_free = ixp425_pci_io_bs_free;
bs->bs_vaddr = ixp425_pci_io_bs_vaddr;
+ /*
+ * IXP425 processor does not have PCI I/O windows
+ */
/* read (single) */
bs->bs_r_1 = _pci_io_bs_r_1;
bs->bs_r_2 = _pci_io_bs_r_2;
diff -r 481244b3f73d -r 61be791c3e4a sys/arch/arm/xscale/ixp425reg.h
--- a/sys/arch/arm/xscale/ixp425reg.h Thu Sep 25 14:17:57 2003 +0000
+++ b/sys/arch/arm/xscale/ixp425reg.h Thu Sep 25 14:48:16 2003 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ixp425reg.h,v 1.10 2003/09/25 14:11:18 ichiro Exp $ */
+/* $NetBSD: ixp425reg.h,v 1.11 2003/09/25 14:48:16 ichiro Exp $ */
/*
* Copyright (c) 2003
* Ichiro FUKUHARA <ichiro%ichiro.org@localhost>.
@@ -430,8 +430,6 @@
#define IXP425_PCI_MEM_SIZE 0x04000000UL /* 64MB */
/* PCI I/O Space */
-#define IXP425_PCI_IO_HWBASE 0x90000000UL
-#define IXP425_PCI_IO_VBASE IXP425_PCI_IO_HWBASE
#define IXP425_PCI_IO_SIZE 0x00100000UL /* 1Mbyte */
/* PCI Controller Configuration Offset */
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