[src/trunk]: src/sys/arch/evbarm/integrator Add a couple of sanity checks in ...

[rearnsha <rearnsha%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/942806f39967
branches:  trunk
changeset: 581038:942806f39967
user:      rearnsha <rearnsha%NetBSD.org@localhost>
date:      Sat May 21 11:46:56 2005 +0000

description:
Add a couple of sanity checks in case someone tries to boot the kernel
on a CM board that we can't support.  In essence that means any board
without an MMU.  For now also fault v6 based CPUs since the kernel
doesn't know how to handle these yet.

diffstat:

 sys/arch/evbarm/integrator/intmmu.S |  61 ++++++++++++++++++++++++++++++++++++-
 1 files changed, 60 insertions(+), 1 deletions(-)

diffs (102 lines):

diff -r c2eec417ccd5 -r 942806f39967 sys/arch/evbarm/integrator/intmmu.S
--- a/sys/arch/evbarm/integrator/intmmu.S       Sat May 21 09:25:21 2005 +0000
+++ b/sys/arch/evbarm/integrator/intmmu.S       Sat May 21 11:46:56 2005 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: intmmu.S,v 1.6 2004/02/13 11:36:12 wiz Exp $ */
+/*     $NetBSD: intmmu.S,v 1.7 2005/05/21 11:46:56 rearnsha Exp $ */
 
 /*
  * Copyright (c) 2001 ARM Ltd
@@ -38,8 +38,33 @@
 
 ASENTRY_NP(integrator_start)
        mov     r6, #0x16000000         /* UART0 Physical base*/
+#ifdef VERBOSE_INIT_ARM
        mov     r3, #'A'
        str     r3, [r6]                /* Let the world know we are alive */
+#endif
+/* 
+ * Check that the processor has a CP15.  Some core modules do not.
+ * We can tell by reading CM_PROC.  If it is zero, then we're OK, otherwise
+ * let the user know why we've died.
+ */
+       mov     r7, #0x10000000
+       ldr     r3, [r7, #4]
+       cmp     r3, #0
+       bne     Lno_cp15
+/*
+ * Now read CP15 and check what sort of core we have.  We need to know
+ * if it has an MMU.  There's no simple test for this, but the following
+ * hack should be sufficient for all currently supported CM boards.
+ *  1) Check that the architecture is less than v6 (V6 has feature registers)
+ *  2) Check that the product code has a '2' in bits 8-11
+ */
+       mrc     p15, 0, r3, c0, c0, 0
+       and     r0, r3, #0x000f0000
+       cmp     r0, #0x00060000
+       bhs     Lno_v6
+       and     r0, r3, #0x00000f00
+       teq     r0, #0x00000200
+       bne     Lno_mmu
 
 /*
  * At this time the MMU is off.
@@ -108,8 +133,10 @@
 
        /* Flush the old TLBs (just in case) */
        mcr     p15, 0, r1, c8, c7, 0
+#ifdef VERBOSE_INIT_ARM
        mov     r2, #'B'
        strb    r2, [r6]
+#endif
 
        /* Set the Domain Access register.  Very important! */
        mov     r1, #1
@@ -136,11 +163,13 @@
        mov     r0, r0
        mov     r0, r0
 
+#ifdef VERBOSE_INIT_ARM
        /* emit a char.  Uart is now at 0xfd600000 */
        mov     r6, #0xfd000000
        add     r6, r6, #0x00600000
        mov     r2, #'C'
        strb    r2, [r6]
+#endif
 
        /* jump to kernel space */
        mov     r0, #0x0200
@@ -149,3 +178,33 @@
        ldr     pc, Lstart
 
 Lstart:        .long   start
+
+Lmsg:
+       ldrb    r2, [r0], #1
+       cmp     r2, #0
+       strneb  r2, [r6]
+Lwait:
+       ldrb    r3, [r6, #0x18]
+       tst     r3, #0x80
+       beq     Lwait
+       cmp     r2, #0
+       bne     Lmsg
+       /* We're toast! */
+       b       .
+       
+Lno_cp15:
+       adr     r0, Lcp15msg
+       b       Lmsg
+Lno_v6:
+       adr     r0, Lv6msg
+       b       Lmsg
+Lno_mmu:
+       adr     r0, Lmmumsg
+       b       Lmsg
+
+Lcp15msg:
+       .ascii "Core has no cp15\r\n\0"
+Lv6msg:
+       .ascii "Architecture v6 not yet supported\r\n\0"
+Lmmumsg:
+       .ascii "Core has no MMU\r\n\0"