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[src/trunk]: src/sys/arch/sgimips/dev CRIME register definitions
details: https://anonhg.NetBSD.org/src/rev/e4856a3e1ab7
branches: trunk
changeset: 540769:e4856a3e1ab7
user: pooka <pooka%NetBSD.org@localhost>
date: Mon Dec 23 20:04:22 2002 +0000
description:
CRIME register definitions
from Chris Sekiya
diffstat:
sys/arch/sgimips/dev/crimereg.h | 179 ++++++++++++++++++++++++++-------------
1 files changed, 117 insertions(+), 62 deletions(-)
diffs (191 lines):
diff -r f5c6d039089b -r e4856a3e1ab7 sys/arch/sgimips/dev/crimereg.h
--- a/sys/arch/sgimips/dev/crimereg.h Mon Dec 23 19:49:27 2002 +0000
+++ b/sys/arch/sgimips/dev/crimereg.h Mon Dec 23 20:04:22 2002 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: crimereg.h,v 1.3 2002/03/13 13:12:26 simonb Exp $ */
+/* $NetBSD: crimereg.h,v 1.4 2002/12/23 20:04:22 pooka Exp $ */
/*
* Copyright (c) 2000 Soren S. Jorvang
@@ -36,65 +36,120 @@
* O2 CRIME register definitions
*/
-#define CRIME_REV 0x000
-#define CRIME_CONTROL 0x008
-#define CRIME_INTSTAT 0x010
-#define CRIME_INTMASK 0x018
-#define CRIME_SOFTINT 0x020
-#define CRIME_HARDINT 0x028
-#define CRIME_DOG 0x030
-#define McGriff CRIME_DOG /* Baseball compatibility */
-#define CRIME_TIME 0x038
-#define CRIME_CPU_ERROR_ADDR 0x040
-#define CRIME_CPU_ERROR_STAT 0x048
-#define CRIME_CPU_ERROR_ENA 0x050
-#define CRM_VICE_ERROR_ADDR 0x058
-#define CRM_MEM_CONTROL 0x200
-#define CRM_MEM_BANK_CTRL0 0x208
-#define CRM_MEM_BANK_CTRL1 0x218
-#define CRM_MEM_BANK_CTRL2 0x210
-#define CRM_MEM_BANK_CTRL3 0x228
-#define CRM_MEM_BANK_CTRL4 0x220
-#define CRM_MEM_BANK_CTRL5 0x238
-#define CRM_MEM_BANK_CTRL6 0x230
-#define CRM_MEM_BANK_CTRL7 0x248
-#define CRM_MEM_REFRESH_CNTR 0x248
-#define CRM_MEM_ERROR_STAT 0x250
-#define CRM_MEM_ERROR_ADDR 0x258
-#define CRM_MEM_ERROR_ECC_SYN 0x260
-#define CRM_MEM_ERROR_ECC_CHK 0x268
-#define CRM_MEM_ERROR_ECC_REPL 0x270
+#define CRIME_BASE 0x14000000 /* all registers 64-bit access */
+
+/* Offset 0x00 -- revision register */
+#define CRIME_REV (CRIME_BASE+0x000)
+#define CRIME_ID_IDBITS 0xf0
+#define CRIME_ID_IDVALUE 0xa0
+#define CRIME_ID_REV 0x0f
+#define CRIME_REV_PETTY 0x0
+#define CRIME_REV_11 0x11
+#define CRIME_REV_13 0x13
+#define CRIME_REV_14 0x14
+
+/* offset 0x08 -- control register. Only lower 14 bits are valid*/
+#define CRIME_CONTROL (CRIME_BASE+0x008)
+#define CRIME_CONTROL_TRITON_SYSADC 0x2000
+#define CRIME_CONTROL_CRIME_SYSADC 0x1000
+#define CRIME_CONTROL_HARD_RESET 0x0800
+#define CRIME_CONTROL_SOFT_RESET 0x0400
+#define CRIME_CONTROL_DOG_ENABLE 0x0200
+#define CRIME_CONTROL_ENDIANESS 0x0100 /* assert for BE */
+#define CRIME_CONTROL_CQUEUE_HWM 0x000f
+#define CRIME_CONTROL_CQUEUE_SHFT 0
+#define CRIME_CONTROL_WBUF_HWM 0x00f0
+#define CRIME_CONTROL_WBUF_SHFT 8
+
+/*
+ * macros to manipulate CRIME High Water Mark bits in
+ * the CRIME control register. Examples:
+ *
+ * foo = CRM_CONTROL_GET_CQUEUE_HWM(*(__uint64_t *)CRM_CONTROL)
+ * CRM_CONTROL_SET_CQUEUE_HWM(*(__uint64_t *)CRM_CONTROL, 4)
+ *
+ * foo = CRM_CONTROL_GET_WBUF_HWM(*(__uint64_t *)CRM_CONTROL)
+ * CRM_CONTROL_SET_WBUF_HWM(*(__uint64_t *)CRM_CONTROL, 4)
+ */
+#define CRM_CONTROL_GET_CQUEUE_HWM(x) \
+ (((x) & CRM_CONTROL_CQUEUE_HWM) >> CRM_CONTROL_CQUEUE_SHFT)
+#define CRM_CONTROL_SET_CQUEUE_HWM(x,v) \
+ (((v) << CRM_CONTROL_CQUEUE_SHFT) | ((x) & ~CRM_CONTROL_CQUEUE_HWM))
+
+#define CRM_CONTROL_GET_WBUF_HWM(x) \
+ (((x) & CRM_CONTROL_WBUF_HWM) >> CRM_CONTROL_WBUF_SHFT)
+#define CRM_CONTROL_SET_WBUF_HWM(x,v) \
+ (((v) << CRM_CONTROL_WBUF_SHFT) | ((x) & ~CRM_CONTROL_WBUF_HWM))
+
-#define CRM_INT_VICE 0x80000000
-#define CRM_INT_SOFT2 0x40000000
-#define CRM_CPU_SysCorErr CRM_INT_SOFT2
-#define CRM_INT_SOFT1 0x20000000
-#define CRM_INT_SOFT0 0x10000000
-#define CRM_INT_RE5 0x08000000
-#define CRM_INT_RE4 0x04000000
-#define CRM_INT_RE3 0x02000000
-#define CRM_INT_RE2 0x01000000
-#define CRM_INT_RE1 0x00800000
-#define CRM_INT_RE0 0x00400000
-#define CRM_INT_MEMERR 0x00200000
-#define CRM_INT_CRMERR 0x00100000
-#define CRM_INT_GBE3 0x00080000
-#define CRM_INT_GBE2 0x00040000
-#define CRM_INT_GBE1 0x00020000
-#define CRM_INT_GBE0 0x00010000
-#define MACE_PCI_SHARED2 0x00008000
-#define MACE_PCI_SHARED1 0x00004000
-#define MACE_PCI_SHARED0 0x00002000
-#define MACE_PCI_SLOT2 0x00001000
-#define MACE_PCI_SLOT1 0x00000800
-#define MACE_PCI_SLOT0 0x00000400
-#define MACE_PCI_SCSI1 0x00000200
-#define MACE_PCI_SCSI0 0x00000100
-#define MACE_PCI_BRIDGE 0x00000080
-#define MACE_PERIPH_AUD 0x00000040
-#define MACE_PERIPH_MISC 0x00000020
-#define MACE_PERIPH_SERIAL 0x00000010
-#define MACE_ETHERNET 0x00000008
-#define MACE_VID_OUT 0x00000004
-#define MACE_VID_IN2 0x00000002
-#define MACE_VID_IN1 0x00000001
+/* Offset 0x010 -- interrupt status register. All 32 bits valid */
+#define CRIME_INTSTAT (CRIME_BASE+0x010)
+#define CRIME_INT_VICE 0x80000000
+#define CRIME_INT_SOFT2 0x40000000 /* Also CPU_SysCorErr */
+#define CRIME_INT_SOFT1 0x20000000
+#define CRIME_INT_SOFT0 0x10000000
+#define CRIME_INT_RE5 0x08000000
+#define CRIME_INT_RE4 0x04000000
+#define CRIME_INT_RE3 0x02000000
+#define CRIME_INT_RE2 0x01000000
+#define CRIME_INT_RE1 0x00800000
+#define CRIME_INT_RE0 0x00400000
+#define CRIME_INT_MEMERR 0x00200000
+#define CRIME_INT_CRMERR 0x00100000
+#define CRIME_INT_GBE3 0x00080000
+#define CRIME_INT_GBE2 0x00040000
+#define CRIME_INT_GBE1 0x00020000
+#define CRIME_INT_GBE0 0x00010000
+#define CRIME_INT_PCI_SHARED2 0x00008000 /* from here, actually mace irqs */
+#define CRIME_INT_PCI_SHARED1 0x00004000
+#define CRIME_INT_PCI_SHARED0 0x00002000
+#define CRIME_INT_PCI_SLOT2 0x00001000
+#define CRIME_INT_PCI_SLOT1 0x00000800
+#define CRIME_INT_PCI_SLOT0 0x00000400
+#define CRIME_INT_PCI_SCSI1 0x00000200
+#define CRIME_INT_PCI_SCSI0 0x00000100
+#define CRIME_INT_PCI_BRIDGE 0x00000080
+#define CRIME_INT_PERIPH_AUD 0x00000040
+#define CRIME_INT_PERIPH_MISC 0x00000020
+#define CRIME_INT_PERIPH_SERIAL 0x00000010
+#define CRIME_INT_ETHERNET 0x00000008
+#define CRIME_INT_VID_OUT 0x00000004
+#define CRIME_INT_VID_IN2 0x00000002
+#define CRIME_INT_VID_IN1 0x00000001
+
+/* Masks, hard interrupts, soft interrupts. Don't know what to do with these */
+#define CRIME_INTMASK (CRIME_BASE+0x018)
+#define CRIME_SOFTINT (CRIME_BASE+0x020)
+#define CRIME_HARDINT (CRIME_BASE+0x028)
+
+/*
+ * Offset 0x030 -- watchdog register. 33 bits are valid
+ * Bit 32: power on reset
+ * Bit 31: warm reset
+ * Write zero here to reset watchdog
+ */
+
+#define CRIME_DOG (CRIME_BASE+0x030)
+#define CRIME_WATCHDOG CRIME_DOG
+#define CRIME_TIME (CRIME_BASE+0x038)
+#define CRIME_CPU_ERROR_ADDR (CRIME_BASE+0x040)
+#define CRIME_CPU_ERROR_STAT (CRIME_BASE+0x048)
+#define CRIME_CPU_ERROR_ENA (CRIME_BASE+0x050)
+#define CRIME_VICE_ERROR_ADDR (CRIME_BASE+0x058)
+#define CRIME_MEM_CONTROL (CRIME_BASE+0x200)
+#define CRIME_MEM_BANK_CTRL0 (CRIME_BASE+0x208)
+#define CRIME_MEM_BANK_CTRL1 (CRIME_BASE+0x218)
+#define CRIME_MEM_BANK_CTRL2 (CRIME_BASE+0x210)
+#define CRIME_MEM_BANK_CTRL3 (CRIME_BASE+0x228)
+#define CRIME_MEM_BANK_CTRL4 (CRIME_BASE+0x220)
+#define CRIME_MEM_BANK_CTRL5 (CRIME_BASE+0x238)
+#define CRIME_MEM_BANK_CTRL6 (CRIME_BASE+0x230)
+#define CRIME_MEM_BANK_CTRL7 (CRIME_BASE+0x248)
+#define CRIME_MEM_REFRESH_CNTR (CRIME_BASE+0x248)
+#define CRIME_MEM_ERROR_STAT (CRIME_BASE+0x250)
+#define CRIME_MEM_ERROR_ADDR (CRIME_BASE+0x258)
+#define CRIME_MEM_ERROR_ECC_SYN (CRIME_BASE+0x260)
+#define CRIME_MEM_ERROR_ECC_CHK (CRIME_BASE+0x268)
+#define CRIME_MEM_ERROR_ECC_REPL (CRIME_BASE+0x270)
+
+#define McGriff CRIME_DOG /* Baseball compatibility */
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