[src/trunk]: src/sys/arch/sparc64/include Have CLKF_BASEPRI() always return f...

[eeh <eeh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/43fedf366d08
branches:  trunk
changeset: 526960:43fedf366d08
user:      eeh <eeh%NetBSD.org@localhost>
date:      Tue May 14 21:21:45 2002 +0000

description:
Have CLKF_BASEPRI() always return false for now to prevent hardclock
from being blocked by softclock.

diffstat:

 sys/arch/sparc64/include/cpu.h |  17 ++++++++++++++++-
 1 files changed, 16 insertions(+), 1 deletions(-)

diffs (32 lines):

diff -r 1ded0637ec97 -r 43fedf366d08 sys/arch/sparc64/include/cpu.h
--- a/sys/arch/sparc64/include/cpu.h    Tue May 14 20:03:53 2002 +0000
+++ b/sys/arch/sparc64/include/cpu.h    Tue May 14 21:21:45 2002 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpu.h,v 1.30 2002/02/09 04:50:13 eeh Exp $ */
+/*     $NetBSD: cpu.h,v 1.31 2002/05/14 21:21:45 eeh Exp $ */
 
 /*
  * Copyright (c) 1992, 1993
@@ -146,7 +146,22 @@
 };
 
 #define        CLKF_USERMODE(framep)   (((framep)->t.tf_tstate & TSTATE_PRIV) == 0)
+/*
+ * XXX Disable CLKF_BASEPRI() for now.  If we use a counter-timer for
+ * the clock, the interrupt remains blocked until the interrupt handler
+ * returns and we write to the clear interrupt register.  If we use 
+ * %tick for the clock, we could get multiple interrupts, but the 
+ * currently enabled INTR_INTERLOCK will prevent the interrupt from being
+ * posted twice anyway.
+ * 
+ * Switching to %tick for all machines and disabling INTR_INTERLOCK
+ * in locore.s would allow us to take advantage of CLKF_BASEPRI().
+ */
+#if 0
 #define        CLKF_BASEPRI(framep)    (((framep)->t.tf_oldpil) == 0)
+#else
+#define        CLKF_BASEPRI(framep)    (0)
+#endif
 #define        CLKF_PC(framep)         ((framep)->t.tf_pc)
 /* Since some files in sys/kern do not know BIAS, I'm using 0x7ff here */
 #define        CLKF_INTR(framep)                                               \