Source-Changes-HG archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

[src/trunk]: src/sys/dev/ic BUS_DMASYNC_* routines are from the point of view...



details:   https://anonhg.NetBSD.org/src/rev/338a24c89b5c
branches:  trunk
changeset: 580999:338a24c89b5c
user:      briggs <briggs%NetBSD.org@localhost>
date:      Thu May 19 20:11:24 2005 +0000

description:
BUS_DMASYNC_* routines are from the point of view of the memory controller,
so BUS_DMASYNC_POSTREAD should follow a device->memory transfer (like for
the rx packet data.
Also, it would be good to do a BUS_DMASYNC_PREWRITE to ensure that packet
data is flushed to memory before the chip tries to transmit data.
Tested on a PowerPC system.

diffstat:

 sys/dev/ic/rtl8169.c |  14 +++++++++++---
 1 files changed, 11 insertions(+), 3 deletions(-)

diffs (42 lines):

diff -r ce0a43aa339f -r 338a24c89b5c sys/dev/ic/rtl8169.c
--- a/sys/dev/ic/rtl8169.c      Thu May 19 16:19:34 2005 +0000
+++ b/sys/dev/ic/rtl8169.c      Thu May 19 20:11:24 2005 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: rtl8169.c,v 1.19 2005/05/15 07:48:49 yamt Exp $        */
+/*     $NetBSD: rtl8169.c,v 1.20 2005/05/19 20:11:24 briggs Exp $      */
 
 /*
  * Copyright (c) 1997, 1998-2003
@@ -493,7 +493,7 @@
            dmamap, 0, dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD);
        dmamap = sc->rtk_ldata.rtk_rx_dmamap[0];
        bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize,
-           BUS_DMASYNC_POSTWRITE);
+           BUS_DMASYNC_POSTREAD);
        bus_dmamap_unload(sc->sc_dmat,
            sc->rtk_ldata.rtk_rx_dmamap[0]);
 
@@ -1153,7 +1153,7 @@
                bus_dmamap_sync(sc->sc_dmat,
                    sc->rtk_ldata.rtk_rx_dmamap[i],
                    0, sc->rtk_ldata.rtk_rx_dmamap[i]->dm_mapsize,
-                   BUS_DMASYNC_POSTWRITE);
+                   BUS_DMASYNC_POSTREAD);
                bus_dmamap_unload(sc->sc_dmat,
                    sc->rtk_ldata.rtk_rx_dmamap[i]);
 
@@ -1575,6 +1575,14 @@
                error = EFBIG;
                goto fail_unload;
        }
+
+       /*
+        * Make sure that the caches are synchronized before we
+        * ask the chip to start DMA for the packet data.
+        */
+       bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
+               BUS_DMASYNC_PREWRITE);
+
        /*
         * Map the segment array into descriptors. Note that we set the
         * start-of-frame and end-of-frame markers for either TX or RX, but



Home | Main Index | Thread Index | Old Index