[src/trunk]: src/sys/arch/arm/arm Fix off-by-one error on cache-range functio...

[rearnsha <rearnsha%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/de3af655ffc4
branches:  trunk
changeset: 581553:de3af655ffc4
user:      rearnsha <rearnsha%NetBSD.org@localhost>
date:      Thu Jun 02 14:40:05 2005 +0000

description:
Fix off-by-one error on cache-range functions (where we use op-by-VA) which
caused us to expunge one more line than necessary.

diffstat:

 sys/arch/arm/arm/cpufunc_asm_arm10.S |  7 ++++++-
 1 files changed, 6 insertions(+), 1 deletions(-)

diffs (49 lines):

diff -r 9ec1bd10d635 -r de3af655ffc4 sys/arch/arm/arm/cpufunc_asm_arm10.S
--- a/sys/arch/arm/arm/cpufunc_asm_arm10.S      Thu Jun 02 14:38:05 2005 +0000
+++ b/sys/arch/arm/arm/cpufunc_asm_arm10.S      Thu Jun 02 14:40:05 2005 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc_asm_arm10.S,v 1.2 2004/08/23 20:53:56 thorpej Exp $    */
+/*     $NetBSD: cpufunc_asm_arm10.S,v 1.3 2005/06/02 14:40:05 rearnsha Exp $   */
 
 /*
  * Copyright (c) 2002 ARM Limited
@@ -80,6 +80,7 @@
        sub     r3, ip, #1
        and     r2, r0, r3
        add     r1, r1, r2
+       sub     r1, r1, #1
        bic     r0, r0, r3
 .Larm10_sync_next:
        mcr     p15, 0, r0, c7, c5, 1   /* Invalidate I cache SE with VA */
@@ -127,6 +128,7 @@
        sub     r3, ip, #1
        and     r2, r0, r3
        add     r1, r1, r2
+       sub     r1, r1, #1
        bic     r0, r0, r3
 .Larm10_wb_next:
        mcr     p15, 0, r0, c7, c10, 1  /* Clean D cache SE with VA */
@@ -144,6 +146,7 @@
        sub     r3, ip, #1
        and     r2, r0, r3
        add     r1, r1, r2
+       sub     r1, r1, #1
        bic     r0, r0, r3
 .Larm10_wbinv_next:
        mcr     p15, 0, r0, c7, c14, 1  /* Purge D cache SE with VA */
@@ -165,6 +168,7 @@
        sub     r3, ip, #1
        and     r2, r0, r3
        add     r1, r1, r2
+       sub     r1, r1, #1
        bic     r0, r0, r3
 .Larm10_inv_next:
        mcr     p15, 0, r0, c7, c6, 1   /* Invalidate D cache SE with VA */
@@ -182,6 +186,7 @@
        sub     r3, ip, #1
        and     r2, r0, r3
        add     r1, r1, r2
+       sub     r1, r1, #1
        bic     r0, r0, r3
 .Larm10_id_wbinv_next:
        mcr     p15, 0, r0, c7, c5, 1   /* Invalidate I cache SE with VA */