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[src/trunk]: src/sys/dev/ic Define some extra configuration block bits used o...



details:   https://anonhg.NetBSD.org/src/rev/6a8981614f57
branches:  trunk
changeset: 510587:6a8981614f57
user:      thorpej <thorpej%NetBSD.org@localhost>
date:      Sat Jun 02 01:04:01 2001 +0000

description:
Define some extra configuration block bits used on the i82550 (a.k.a.
PRO 100/S), including the extended RFA format.  Don't hard-code the
RFA size to allow us to use the extended format in the future.

diffstat:

 sys/dev/ic/i82557.c    |  20 +++++++++++--
 sys/dev/ic/i82557reg.h |  73 +++++++++++++++++++++++++++++++++----------------
 sys/dev/ic/i82557var.h |  17 ++++++-----
 3 files changed, 75 insertions(+), 35 deletions(-)

diffs (260 lines):

diff -r e1f638030a68 -r 6a8981614f57 sys/dev/ic/i82557.c
--- a/sys/dev/ic/i82557.c       Sat Jun 02 00:54:20 2001 +0000
+++ b/sys/dev/ic/i82557.c       Sat Jun 02 01:04:01 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: i82557.c,v 1.52 2001/05/22 15:29:30 thorpej Exp $      */
+/*     $NetBSD: i82557.c,v 1.53 2001/06/02 01:04:01 thorpej Exp $      */
 
 /*-
  * Copyright (c) 1997, 1998, 1999, 2001 The NetBSD Foundation, Inc.
@@ -167,7 +167,17 @@
        0xf0,   /* 18 */
        0x0,    /* 19 */
        0x3f,   /* 20 */
-       0x5     /* 21 */
+       0x5,    /* 21 */
+       0x0,    /* 22 */
+       0x0,    /* 23 */
+       0x0,    /* 24 */
+       0x0,    /* 25 */
+       0x0,    /* 26 */
+       0x0,    /* 27 */
+       0x0,    /* 28 */
+       0x0,    /* 29 */
+       0x0,    /* 30 */
+       0x0,    /* 31 */
 };
 
 void   fxp_mii_initmedia(struct fxp_softc *);
@@ -259,6 +269,9 @@
 
        callout_init(&sc->sc_callout);
 
+       /* Start out using the standard RFA. */
+       sc->sc_rfa_size = RFA_SIZE;
+
        /*
         * Enable some good stuff on i82558 and later.
         */
@@ -1376,7 +1389,8 @@
                                    FXP_CB_COMMAND_EL);
        /* BIG_ENDIAN: no need to swap to store 0xffffffff */
        cbp->link_addr =        0xffffffff; /* (no) next command */
-       cbp->byte_count =       22;     /* (22) bytes to config */
+                                       /* bytes in config block */
+       cbp->byte_count =       FXP_CONFIG_LEN;
        cbp->rx_fifo_limit =    8;      /* rx fifo threshold (32 bytes) */
        cbp->tx_fifo_limit =    0;      /* tx fifo threshold (0 bytes) */
        cbp->adaptive_ifs =     0;      /* (no) adaptive interframe spacing */
diff -r e1f638030a68 -r 6a8981614f57 sys/dev/ic/i82557reg.h
--- a/sys/dev/ic/i82557reg.h    Sat Jun 02 00:54:20 2001 +0000
+++ b/sys/dev/ic/i82557reg.h    Sat Jun 02 01:04:01 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: i82557reg.h,v 1.9 2001/05/25 08:54:40 hannken Exp $    */
+/*     $NetBSD: i82557reg.h,v 1.10 2001/06/02 01:04:01 thorpej Exp $   */
 
 /*-
  * Copyright (c) 1998, 1999, 2001 The NetBSD Foundation, Inc.
@@ -191,21 +191,23 @@
        volatile u_int16_t      cb_status;
        volatile u_int16_t      cb_command;
        volatile u_int32_t      link_addr;
-       volatile u_int8_t       __FXP_BITFIELD2(byte_count:6, :2);
-       volatile u_int8_t       __FXP_BITFIELD3(rx_fifo_limit:4,
+
+       /* Bytes 0 - 21 -- common to all i8255x */
+/*0*/  volatile u_int8_t       __FXP_BITFIELD2(byte_count:6, :2);
+/*1*/  volatile u_int8_t       __FXP_BITFIELD3(rx_fifo_limit:4,
                                    tx_fifo_limit:3,
                                    :1);
-       volatile u_int8_t       adaptive_ifs;
-       volatile u_int8_t       __FXP_BITFIELD5(mwi_enable:1,   /* 8,9 */
+/*2*/  volatile u_int8_t       adaptive_ifs;
+/*3*/  volatile u_int8_t       __FXP_BITFIELD5(mwi_enable:1,   /* 8,9 */
                                    type_enable:1,              /* 8,9 */
                                    read_align_en:1,            /* 8,9 */
                                    end_wr_on_cl:1,             /* 8,9 */
                                    :4);
-       volatile u_int8_t       __FXP_BITFIELD2(rx_dma_bytecount:7,
+/*4*/  volatile u_int8_t       __FXP_BITFIELD2(rx_dma_bytecount:7,
                                    :1);
-       volatile u_int8_t       __FXP_BITFIELD2(tx_dma_bytecount:7,
+/*5*/  volatile u_int8_t       __FXP_BITFIELD2(tx_dma_bytecount:7,
                                    dma_mbce:1);
-       volatile u_int8_t       __FXP_BITFIELD8(late_scb:1,     /* 7 */
+/*6*/  volatile u_int8_t       __FXP_BITFIELD8(late_scb:1,     /* 7 */
                                    direct_dma_dis:1,           /* 8,9 */
                                    tno_int_or_tco_en:1,        /* 7,9 */
                                    ci_int:1,
@@ -213,32 +215,33 @@
                                    ext_stats_dis:1,            /* 8,9 */
                                    keep_overrun_rx:1,
                                    save_bf:1);
-       volatile u_int8_t       __FXP_BITFIELD5(disc_short_rx:1,
+/*7*/  volatile u_int8_t       __FXP_BITFIELD6(disc_short_rx:1,
                                    underrun_retry:2,
-                                   :3,
+                                   :2,
+                                   extended_rfd_en:1,          /* 0 */
                                    two_frames:1,               /* 8,9 */
                                    dyn_tbd:1);                 /* 8,9 */
-       volatile u_int8_t       __FXP_BITFIELD3(mediatype:1,    /* 7 */
+/*8*/  volatile u_int8_t       __FXP_BITFIELD3(mediatype:1,    /* 7 */
                                    :6,
                                    csma_dis:1);                /* 8,9 */
-       volatile u_int8_t       __FXP_BITFIELD6(tcp_udp_cksum:1,/* 9 */
+/*9*/  volatile u_int8_t       __FXP_BITFIELD6(tcp_udp_cksum:1,/* 9 */
                                    :3,
                                    vlan_tco:1,                 /* 8,9 */
                                    link_wake_en:1,             /* 8,9 */
                                    arp_wake_en:1,              /* 8 */
                                    mc_wake_en:1);              /* 8 */
-       volatile u_int8_t       __FXP_BITFIELD4(:3,
+/*10*/ volatile u_int8_t       __FXP_BITFIELD4(:3,
                                    nsai:1,
                                    preamble_length:2,
                                    loopback:2);
-       volatile u_int8_t       __FXP_BITFIELD2(linear_priority:3,/* 7 */
+/*11*/ volatile u_int8_t       __FXP_BITFIELD2(linear_priority:3,/* 7 */
                                    :5);
-       volatile u_int8_t       __FXP_BITFIELD3(linear_pri_mode:1,/* 7 */
+/*12*/ volatile u_int8_t       __FXP_BITFIELD3(linear_pri_mode:1,/* 7 */
                                    :3,
                                    interfrm_spacing:4);
-       volatile u_int8_t       :8;
-       volatile u_int8_t       :8;
-       volatile u_int8_t       __FXP_BITFIELD8(promiscuous:1,
+/*13*/ volatile u_int8_t       :8;
+/*14*/ volatile u_int8_t       :8;
+/*15*/ volatile u_int8_t       __FXP_BITFIELD8(promiscuous:1,
                                    bcast_disable:1,
                                    wait_after_win:1,           /* 8,9 */
                                    :1,
@@ -246,15 +249,15 @@
                                    crc16_en:1,                 /* 9 */
                                    :1,
                                    crscdt:1);
-       volatile u_int8_t       fc_delay_lsb:8;                 /* 8,9 */
-       volatile u_int8_t       fc_delay_msb:8;                 /* 8,9 */
-       volatile u_int8_t       __FXP_BITFIELD6(stripping:1,
+/*16*/ volatile u_int8_t       fc_delay_lsb:8;                 /* 8,9 */
+/*17*/ volatile u_int8_t       fc_delay_msb:8;                 /* 8,9 */
+/*18*/ volatile u_int8_t       __FXP_BITFIELD6(stripping:1,
                                    padding:1,
                                    rcv_crc_xfer:1,
                                    long_rx_en:1,               /* 8,9 */
                                    pri_fc_thresh:3,            /* 8,9 */
                                    :1);
-       volatile u_int8_t       __FXP_BITFIELD8(ia_wake_en:1,   /* 8 */
+/*19*/ volatile u_int8_t       __FXP_BITFIELD8(ia_wake_en:1,   /* 8 */
                                    magic_pkt_dis:1,            /* 8,9,!9ER */
                                    tx_fc_dis:1,                /* 8,9 */
                                    rx_fc_restop:1,             /* 8,9 */
@@ -262,13 +265,22 @@
                                    fc_filter:1,                /* 8,9 */
                                    force_fdx:1,
                                    fdx_pin_en:1);
-       volatile u_int8_t       __FXP_BITFIELD4(:5,
+/*20*/ volatile u_int8_t       __FXP_BITFIELD4(:5,
                                    pri_fc_loc:1                /* 8,9 */,
                                    multi_ia:1,
                                    :1);
-       volatile u_int8_t       __FXP_BITFIELD3(:3, mc_all:1, :4);
+/*21*/ volatile u_int8_t       __FXP_BITFIELD3(:3, mc_all:1, :4);
+
+       /* Bytes 22 - 31 -- i82550 only */
+/*22*/ volatile u_int8_t       __FXP_BITFIELD3(ext_rx_mode:1,
+                                   vlan_drop_en:1,
+                                   :6);
+       volatile u_int8_t       reserved[9];
 };
 
+#define        FXP_CONFIG_LEN          22      /* i8255x */
+#define        FXP_EXT_CONFIG_LEN      32      /* i82550 */
+
 /*
  * Multicast setup command.
  */
@@ -340,14 +352,27 @@
  * we must make them an array of bytes!
  */
 struct fxp_rfa {
+       /* Fields common to all i8255x chips. */
        volatile u_int16_t rfa_status;
        volatile u_int16_t rfa_control;
        volatile u_int8_t link_addr[4];
        volatile u_int8_t rbd_addr[4];
        volatile u_int16_t actual_size;
        volatile u_int16_t size;
+
+       /* Fields available only on the i82550 in extended RFD mode. */
+       volatile u_int16_t vlan_id;
+       volatile u_int8_t rx_parse_stat;
+       volatile u_int8_t reserved;
+       volatile u_int16_t security_stat;
+       volatile u_int8_t cksum_stat;
+       volatile u_int8_t zerocopy_stat;
+       volatile u_int8_t unused[8];
 };
 
+#define        RFA_SIZE                16
+#define        RFA_EXT_SIZE            32
+
 #define FXP_RFA_STATUS_RCOL    0x0001  /* receive collision */
 #define FXP_RFA_STATUS_IAMATCH 0x0002  /* 0 = matches station address */
 #define FXP_RFA_STATUS_S4      0x0010  /* receive error from PHY */
diff -r e1f638030a68 -r 6a8981614f57 sys/dev/ic/i82557var.h
--- a/sys/dev/ic/i82557var.h    Sat Jun 02 00:54:20 2001 +0000
+++ b/sys/dev/ic/i82557var.h    Sat Jun 02 01:04:01 2001 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: i82557var.h,v 1.23 2001/05/22 15:29:30 thorpej Exp $   */
+/*     $NetBSD: i82557var.h,v 1.24 2001/06/02 01:04:01 thorpej Exp $   */
 
 /*-
  * Copyright (c) 1997, 1998, 1999, 2001 The NetBSD Foundation, Inc.
@@ -177,6 +177,7 @@
         */
        struct fxp_txsoft sc_txsoft[FXP_NTXCB];
 
+       int     sc_rfa_size;            /* size of the RFA structure */
        struct ifqueue sc_rxq;          /* receive buffer queue */
        bus_dmamap_t sc_rxmaps[FXP_NRFABUFS]; /* free receive buffer DMA maps */
        int     sc_rxfree;              /* free map index */
@@ -251,18 +252,18 @@
        bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap,                 \
            FXP_CDSTATSOFF, sizeof(struct fxp_stats), (ops))
 
-#define        FXP_RXBUFSIZE(m)        ((m)->m_ext.ext_size -                  \
-                                (sizeof(struct fxp_rfa) +              \
+#define        FXP_RXBUFSIZE(sc, m)    ((m)->m_ext.ext_size -                  \
+                                (sc->sc_rfa_size +                     \
                                  RFA_ALIGNMENT_FUDGE))
 
 #define        FXP_RFASYNC(sc, m, ops)                                         \
        bus_dmamap_sync((sc)->sc_dmat, M_GETCTX((m), bus_dmamap_t),     \
-           RFA_ALIGNMENT_FUDGE, sizeof(struct fxp_rfa), (ops))
+           RFA_ALIGNMENT_FUDGE, (sc)->sc_rfa_size, (ops))
 
 #define        FXP_RXBUFSYNC(sc, m, ops)                                       \
        bus_dmamap_sync((sc)->sc_dmat, M_GETCTX((m), bus_dmamap_t),     \
-           RFA_ALIGNMENT_FUDGE + sizeof(struct fxp_rfa),               \
-           FXP_RXBUFSIZE((m)), (ops))
+           RFA_ALIGNMENT_FUDGE + (sc)->sc_rfa_size,                    \
+           FXP_RXBUFSIZE((sc), (m)), (ops))
 
 #define        FXP_MTORFA(m)   (struct fxp_rfa *)((m)->m_ext.ext_buf +         \
                                           RFA_ALIGNMENT_FUDGE)
@@ -274,11 +275,11 @@
        struct fxp_rfa *__rfa, *__p_rfa;                                \
        u_int32_t __v;                                                  \
                                                                        \
-       (m)->m_data = (m)->m_ext.ext_buf + sizeof(struct fxp_rfa) +     \
+       (m)->m_data = (m)->m_ext.ext_buf + (sc)->sc_rfa_size +          \
            RFA_ALIGNMENT_FUDGE;                                        \
                                                                        \
        __rfa = FXP_MTORFA((m));                                        \
-       __rfa->size = htole16(FXP_RXBUFSIZE((m)));                      \
+       __rfa->size = htole16(FXP_RXBUFSIZE((sc), (m)));                \
        /* BIG_ENDIAN: no need to swap to store 0 */                    \
        __rfa->rfa_status = 0;                                          \
        __rfa->rfa_control = htole16(FXP_RFA_CONTROL_EL);               \



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